Adi_Ports_Enabletimer - Analog Devices VisualDSP++ 5.0 Service Manual

Visualdsp++ 5.0 device drivers and system for blackfin processors
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adi_ports_EnableTimer

Description
The
adi_ports_EnableTimer
to enable the appropriate flag pins for the output of general-purpose (GP)
timer clock signals, the timer clock input (used mainly for PPI clock),
alternate timer clock inputs
UART inputs.
Any number of pins as required can be assigned in the one call to
adi_ports_EnableTimer
Prototype
adi_ports_EnableTimer (
u32
u32
u32
);
Arguments
Directives
nDirectives
Enable
1
Alternatively, the TACLKx flag pins can provide the clock signal to the general-purpose timers in
PWM_OUT mode. For details, see
2
Timers must be configured for WDTH_CAP mode. For details, see
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
function configures the port control registers
1
, and for bit rate detection on CAN and
2
.
"Timer Service" on page
Port Control Service
*Directives,
nDirectives,
Enable
Address of an array of directives describing the tim-
ers for which the flags are configured. See
tive Enumeration Values" on page
Number of entries in
Directives
Flag determining whether the functionality is
enabled (1) or disabled (0)
8-1.
"Timer Service" on page
"Direc-
9-17.
array
8-1.
9-13

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