Analog Devices VisualDSP++ 5.0 Service Manual page 212

Setting Control Values in the EBIU Module
bank number) in the asynchronous memory bank control 0 register (for
banks 0 and 1) or the asynchronous memory bank control 1 register (for
banks 2 and 3).
ADI_EBIU_ASYNCH_TT_4_CYCLES
ADI_EBIU_ASYNCH_TT_1_CYCLES
ADI_EBIU_ASYNCH_TT_2_CYCLES
ADI_EBIU_ASYNCH_TT_3_CYCLES
4-48
4 cycles transition time
1 cycles transition time
2 cycles transition time
3 cycles transition time
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors