Analog Devices VisualDSP++ 5.0 Service Manual page 6

Contents
adi_int_CECUnhook ............................................................ 2-22
adi_int_ClearIMaskBits ........................................................ 2-24
adi_int_EnterCriticalRegion .................................................. 2-26
adi_int_ExitCriticalRegion .................................................... 2-28
adi_int_SICDisable ............................................................... 2-29
adi_int_SICEnable ................................................................ 2-30
adi_int_SICGetIVG .............................................................. 2-31
adi_int_SICInterruptAsserted ................................................ 2-32
adi_int_SICSetIVG .............................................................. 2-33
adi_int_SetIMaskBits ............................................................ 2-34
adi_int_SICWakeup .............................................................. 2-36
POWER MANAGEMENT MODULE
Introduction ................................................................................. 3-2
PM Module Operation - Getting Started ...................................... 3-3
Dual-Core Considerations ............................................................ 3-5
Using Automatic Synchronization ........................................... 3-5
Synchronization Requirement .................................................. 3-6
Running Applications on One Core Only ................................ 3-7
Running Applications on Both Cores ....................................... 3-8
Synchronization Between Cores ............................................. 3-10
Built-In Lock Variable and Linking Considerations ................ 3-10
SDRAM Initialization Prior to Loading an Executable ................. 3-13
vi VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors