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System Design Considerations
7.1
Power Delivery
Power delivery terminology definitions are indicated in
on page
1-1.
7.1.1
Intel
Figure 7-1
This power delivery architecture supports the "Instantly Available PC Design Guidelines" via the
suspend-to-RAM (STR) state.
During STR, only the necessary devices are powered. These devices include: main memory, the
ICH resume well, PCI wake devices (via 3.3Vaux), the Intel
optionally USB (USB can only be powered if sufficient standby power is available). To ensure that
enough power is available during STR, a thorough power budget should be completed. The power
requirements should include each device's power requirements, both in suspend and in full-power.
The power requirements should be compared against the power budget supplied by the power
supply. Due to the requirements of main memory and PCI 3.3Vaux (and possibly other devices in
the system), it is necessary to create a dual power rail.
The solutions given in this Design Guide are only examples. There are many power distribution
methods that achieve the similar results. It is critical, when deviating from these examples to
consider the effect of the change.
®
Intel
810A3 Chipset Design Guide
810A3 Chipset Power Delivery
shows the power delivery architecture for an example Intel
System Design Considerations
Section 1.1, "About This Design Guide"
810A3 Chipset Platform.
82559 LAN down chip, AC'97 and
7
7-1
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