Sharp MX-4100N Service Manual page 267

60
60-1
Purpose Operation test/check
Function (Purpose) Used to check the operations (read/write)
of the MFP PWB image memory (SDRAM).
Section
Operation/Procedure
1) Press [EXECUTE] key.
Start the test.
Result display
OK Success
NG Fail
NONE Not installed (Including DIMM trouble)
INVALID Execution disable
SLOT Description
SLOT1 System memory (expansion)
SLOT2 System memory (standard)
SLOT3 Local memory (MFP expansion)
SLOT4 Local memory (MFP standard)
SLOT5 Local memory (Codec standard)
SLOT6 Local memory (ACREA standard)
60-2
Purpose (This simulation is normally not used in the
market.)
Function (Purpose) Used to set the MFP PWB onboard
SDRAM.
Section
Operation/Procedure
1) Select a target item of setting with [↑] [↓] key on the touch
panel.
2) Enter the set value with 10-key.
3) Press [OK] key.
NOTE: Set to the default value.
Item/Display
A SETTING DISABLE SDRAM
ENABLE setting
change
flag
ENABLE
B NUMBER 11BIT ROW address
OF ROW width
12BIT
13BIT
Description
DIMM1
DIMM2
DIMM4
DIMM3
DIMM5
-
Setting Default
Content
range value
DDR 0 - 1 0 0
setting
of
Onboard
SPD
DDR 1
setting
of B or
later
0 - 2 0 2
1
2
MX-5001N SIMULATION 6 – 120
Item/Display
C NUMBER 8BIT COLUMN address
OF width
9BIT
COLUMN
10BIT
11BIT
12BIT
D TWR 2CLOCK TWR set value
SETTING
3CLOCK
VALUE
4CLOCK
5CLOCK
E TRAS 4CLOCK TRAS set value
SETTING
5CLOCK
VALUE
6CLOCK
7CLOCK
F TRC 6CLOCK TRC set value
SETTING
7CLOCK
VALUE
8CLOCK
9CLOCK
10CLOCK
G TRCD 2CLOCK TRCD set value
SETTING
3CLOCK
VALUE
4CLOCK
5CLOCK
H TRP 2CLOCK TRP set value
SETTING
3CLOCK
VALUE
4CLOCK
5CLOCK
I TFRC 7CLOCK TFRC set value
SETTING
8CLOCK
VALUE
-
20CLOCK
J CAS CL=2 CAS latency
LATENC
CL=2.5
Y
CL=3
K TOTAL NONE Onboard DDR total
NUMBER capacity
128M
OF
BYTE
MBYTES
256M
ON
BYTE
BOARD
DDR
L NUMBER NONE Onboard DDR bunk
OF ON number
1CHIP
BOARD-
SELECT
DDR
2CHIP
CS-BANK
SELECT
Setting Default
Content
range value
0 - 4 0 2
1
2
3
4
0 - 3 0 1
1
2
3
0 - 3 0 2
1
2
3
0 - 4 0 3
1
2
3
4
0 - 3 0 1
1
2
3
0 - 3 0 1
1
2
3
0 - 0 3
13
1
-
1
3
0 - 2 0 1
1
2
0 - 2 0 1
1
2
0 - 2 0 1
1
2