Single Address Single Transfer From I/O To Memory (64-Bit Sdram) - Toshiba TMPR4937 Manual

8.5.11

Single Address Single Transfer from I/O to Memory (64-bit SDRAM)

SDCLK
CS*
ADDR [19:5]
RAS*
CAS*
WE*
CKE*
OE*
DQM [7:0]
DATA [63:0]
ACK*
DMAREQ[n]
DMAACK[n]
DMADONE*
Figure 8.5.12 Single Address Single Transfer from I/O to Memory
0001
ff
(Single Write of 64-bit Data to 64-bit SDRAM)
8-51
Chapter 8 DMA Controller
0040
00 ff