Registers - Toshiba TMPR4937 Manual

5.2

Registers

Table 5.2.1 lists the configuration registers.
Offset Address
0xE000
0xE008
0xE010
0xE018
0xE020
0xE030
0xE048
Any address not defined in this table is reserved for future use.
Table 5.2.1 Configuration Register Mapping
Size in Bits Register Symbol
64 CCFG
64 REVID
64 PCFG
64 TOEA
64 CLKCTR
64 GARBC
64 RAMP
5-2
Chapter 5 Configuration Registers
Register Name
Chip Configuration Register
Chip Revision ID Register
Pin Configuration Register
Timeout Error Access Address Register
Clock Control Register
G-Bus Arbiter Control Register
Register Address Mapping Register