Toshiba TMPR4937 Manual page 89

Bit Mnemonic Field Name
Shared-Pin
8 SEL1
Status 1
⎯
7:4 Reserved
DMA Request
3 DMASEL3
Select 3
2 DMASEL2 DMA Request
Select 2
1 DMASEL1 DMA Request
Select 1
1:0 DMASEL0 DMA Request
Select 0
Description
Indicates which function, PIO[15:8] or CB[7:0], the shared pins
are set to.
L: 0 = The shared pins are set to PIO[15:8].
H: 1 = The shared pins are set to CB[7:0].
Selects a DMA request used by DMA controller 0 channel 3.
0: DMAREQ[3] (external)
1: SIO channel 0 transmission (internal)
Selects a DMA request used by DMA controller 0 channel 2.
0: DMAREQ[2] (external)
1: SIO channel 0 reception (internal)
Selects a DMA request used by DMA controller 0 channel 1.
00: DMAREQ[1] (external)
01: SIO channel 1 transmission (internal)
Selects a DMA request used by DMA controller 0 channel 0.
00: DMAREQ[0] (external)
01: SIO channel 1 reception (internal)
Figure 5.2.3 Pin Configuration Register (3/3)
5-9
Chapter 5 Configuration Registers
⎯
Initial Value Read/Write
R
ADDR[18]
⎯ ⎯
0 R/W
0 R/W
0 R/W
0 R/W