Toshiba TMPR4937 Manual page 482

Bit Mnemonic Field Name
9 IS9 Interrupt Status 9
8 IS8 Interrupt Status 8
7 IS7 Interrupt Status 7
6 IS6 Interrupt Status 6
5 IS5 Interrupt Status 5
4 IS4 Interrupt Status 4
3 IS3 Interrupt Status 3
2 IS2 Interrupt Status 2
1 IS1 Interrupt Status 1
0 IS0 Interrupt Status 0
IRINTREQ [9] status
This bit indicates the status of SIO [1] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [8] status
This bit indicates the status of SIO [0] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [7] status
This bit indicates the status of external INT [5] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [6] status
This bit indicates the status of external INT [4] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [5] status
This bit indicates the status of external INT [3] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [4] status
This bit indicates the status of external INT [2] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [3] status
This bit indicates the status of external INT [1] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [2] status
This bit indicates the status of external INT [0] interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [1] status
This bit indicates the status of TX49 Write Timeout Error interrupts.
1: Interrupt requests
0: No interrupt requests
IRINTREQ [0] status
This bit indicates the status of ECC Error interrupts.
1: Interrupt requests
0: No interrupt requests
Figure 15.4.14 Interrupt Source Status Register (3/3)
15-36
Chapter 15 Interrupt Controller
Explanation Read/Write
R
R
R
R
R
R
R
R
R
R