12.4.7
Pulse Generator Mode Register n (TMPGMRn)
31
15
14
13
TPIBE TPIAE
R/W
R/W
0
0
Bit
Mnemonic
Field Name
31:16
Reserved
15
TPIBE
TMCPRB
Interrupt Enable
14
TPIAE
TMCPRA
Interrupt Enable
13:1
Reserved
0
FFI
Flip Flop Default
Reserved
Reserved
Timer Pulse Generator Interrupt by TMCPRB Enable (Default: 0)
When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable
for when TMCPRB and the counter value match.
0: Mask
1: Do not mask
Timer Pulse Generator Interrupt by TMCPRA Enable (Default: 0)
When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable
for when TMCPRA and the counter value match.
0: Mask
1: Do not mask
Initial TIMER Output Level (Default: 0)
This bit specifies the TIMER[n] signal default when in the Pulse Generator
mode.
0: Low
1: High
Figure 12.4.7 Pulse Generator Mode Register
12-16
Chapter 12 Timer/Counter
TMPGMR0 0xF000
TMPGMR1 0xF130
Description
16
: Type
: Initial value
1
0
FFI
R/W : Type
: Initial value
0
Read/Write
⎯
R/W
R/W
⎯
R/W