Toshiba TMPR4937 Manual page 256

64-bit tx system risc
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SDCLK
SDCS*
ADDR
[19:5]
RAS*
CAS*
WE*
CKE
DQM [7:0]
ff
DATA [63:0]
CB [7:0]
ACK*/READY*
Figure 9.5.15 Power Down Auto Entry (SDCTR.PDAE = 1, SDCTR.ACE = 0)
Chapter 9 SDRAM Controller
0000
0400
00
9-40
ff

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