Toshiba TMPR4937 Manual page 72

Offset Address Register Size (bit) Register Symbol
SDRAM Controller (SDRAMC)
0x8000
0x8008
0x8010
0x8018
0x8040
0x8058
External Bus Controller (EBUSC)
0x9000
0x9008
0x9010
0x9018
0x9020
0x9028
0x9030
0x9038
SDRAM Error Check Correction (ECC)
0xA000
0xA008
Table 4.2.3 Internal Registers (1/9)
64 SDCCR0
64 SDCCR1
64 SDCCR2
64 SDCCR3
64 SDCTR
64 SDCCMD
64 EBCCR0
64 EBCCR1
64 EBCCR2
64 EBCCR3
64 EBCCR4
64 EBCCR5
64 EBCCR6
64 EBCCR7
64 ECCCR
64 ECCSR
4-4
Chapter 4 Address Mapping
Register Name
SDRAM Channel Control Register 0
SDRAM Channel Control Register 1
SDRAM Channel Control Register 2
SDRAM Channel Control Register 3
SDRAM Timing Register
SDRAM Command Register
EBUS Channel Control Register 0
EBUS Channel Control Register 1
EBUS Channel Control Register 2
EBUS Channel Control Register 3
EBUS Channel Control Register 4
EBUS Channel Control Register 5
EBUS Channel Control Register 6
EBUS Channel Control Register 7
ECC Control Register
ECC Status Register