Agtl+ I/O Buffer Compensation; Intel Pentium M Processor Agtl+ I/O Buffer Compensation; Intel E7501 Chipset Agtl+ I/O Buffer Compensation; Voltage Translation Circuit - Intel Pentium M Processor Design Manual

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Intel Pentium M Processor and Intel
System Bus Routing Guidelines
With the low 1.05 V signaling level of the Intel
translation circuit provides ample isolation of any transients or signal reflections at the input of
transistor Q1 from reaching the output of transistor Q2. Based on simulation results, the voltage
translation circuit may effectively isolate transients as large as 200 mV and that last as long as
60 ns.
Figure 32.

Voltage Translation Circuit

5.1.8

AGTL+ I/O Buffer Compensation

The Intel Pentium M processor has four compensation pins, COMP[3:0]. Refer to the Intel
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Pentium
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Intel E7501 MCH has two compensation pins, HXRCOMP and HYRCOMP that require
compensation resistors to adjust the AGTL+ I/O buffer characteristics to specific board and
operating environment characteristics. Also, the MCH requires two special reference voltage
generation circuits to pins HXSWNG and HYSWNG for the same purpose described above.
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5.1.8.1 Intel Pentium
For the Intel
to ground with 27.4 Ω ± 1% resistors and should be connected to the Intel Pentium M processor
with a trace impedance of 27.4 Ω. The resistor must be less than 0.5 inches from the processor pins.
The COMP[3] and COMP[1] pins must each be pulled-down to ground with 54.9 Ω ± 1% resistors
and should be connected to the Intel Pentium M processor with a trace impedance of 54.9 Ω trace.
The resistor must be less than 0.5 inches from the processor pins. COMP[3:0] traces should be at
least 25 mils (> 50 mils preferred) away from any other toggling signal.
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5.1.8.2 Intel E7501 Chipset AGTL+ I/O Buffer Compensation
For the Intel
1% resistor pull-down to ground. Terminate the MCH HXSWNG and HYSWNG using a resistor
divider circuit (see
70
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E7501 Chipset Platform
1.3K Ω
330 Ω
+/ - 5%
From Driver
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Pentium M Processor Datasheet for additional details on resistive compensation. The
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M Processor AGTL+ I/O Buffer Compensation
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Pentium M processor, the COMP[2] and COMP[0] pins must each be pulled-down
® E7501 MCH, terminate the HXRCOMP and HYRCOMP with their own 24.9 Ω ±
Figure 33).
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Pentium M processor system bus, the voltage
3.3V
3.3V
330 Ω
+/ - 5%
R1
+/ - 5%
Q2
3904
Q1
3904
R2
To Receiver
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Design Guide