Single Channel Clock Enable Routing; Single Channel Cke Topology - Intel Pentium M Processor Design Manual

Table of Contents

Advertisement

6.4.6

Single Channel Clock Enable Routing

The MCH provides a single clock enable (CKE) signal. This signal is used during initialization to
indicate that valid power and clocks are being applied to the DIMMs. Because the CKE signal has
higher loading, it requires a lower impedance. The recommended impedance for the CKE signal is
40 Ω. This may be achieved using a 7.5-mils wide trace on the recommended stack-up (refer to
Table
31). It is acceptable to route the CKE signal 5-mils wide with 5-mils spacing when breaking
out of the MCH. However, the trace must be widened to 7.5 mils before widening the spacing to
15-mils. The CKE signal requires a parallel termination resistor (Rtt) to DDR VTERM placed as
close to the last DIMM connector as possible.
Table 47.
Single Channel Clock Enable Routing Guidelines
Parameter
Signal Group
Topology
Reference Plane
Trace Impedance (Z
)
0
Nominal Trace Width
Nominal Trace Spacing
MCH to DIMM1 Trace Length
DIMM to DIMM Trace Length
CKE_x Stub Trace Length
DIMM to Rtt Trace Length
MCH Breakout Guidelines
Length Tuning Requirements
† Breakout distance is measured from outer ball array.
.
Figure 64.

Single Channel CKE Topology

MCH
NOTE: Indicated lengths measure from the MCH component die pad to the DIMM connector pin.
Design Guide
®
Intel
Pentium
1-DIMM Solution
0°, 25°, 90°
40 Ω ± 10%
7.5 mils
15 mils
1.8" to 6.0"
Not Applicable
< 300 mils
< 0.8"
5/5 (1:1),
< 500 mils
CKE to CMDCLK/
CMDCLK#:
± 1 inches
CKE Stub
CKE
Channel A
MCH to DIMM1
®
M Processor and Intel
Memory Interface Routing Guidelines
2-DIMM Solution
2-DIMM Solution
25°
CKE
Daisy Chain with Stubs
Ground
40 Ω ± 10%
7.5 mils
15 mils
1.8" to 6.0"
1.8" to 2.2"
< 300 mils
< 0.8"
5/5 (1:1),
< 500 mils
CMDCLK to
CMDCLK#:
± 2 mils
DIMM to
DIMM
DIMM
to Rtt
DIMMs
®
E7501 Chipset Platform
Reference
90°
Figure 64
Figure 59
40 Ω ± 10%
Table 42
7.5 mils
Figure 59
15 mils
Figure 59
1.8" to 6.0"
Figure 64
1.0" to 1.2"
Figure 64
< 300 mils
Figure 64
< 0.8"
Figure 64
5/5 (1:1),
< 500 mils
CMDCLK to
CMDCLK#:
Figure 64
± 2 mils
DDR VTERM
(1.25V)
Rtt
103

Advertisement

Table of Contents
loading

This manual is also suitable for:

E7501

Table of Contents