Table Of Contents - Intel Pentium M Processor Design Manual

Table of Contents

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Contents
1
Introduction..................................................................................................................................19
1.1
Reference Documents ........................................................................................................19
1.2
Terminology ........................................................................................................................ 21
1.3
System Overview ................................................................................................................ 24
1.3.1
1.3.1.1
1.3.1.2
1.3.1.3
1.3.2
1.3.3
1.3.3.1
1.3.3.2
1.3.3.3
1.3.4
Peak Bandwidth Summary .................................................................................... 29
1.3.5
System Configurations........................................................................................... 29
2
Component Quadrant Layout ..................................................................................................... 31
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2.1
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2.2
E7501 Chipset MCH Quadrant Layout ..................................................................... 33
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2.3
ICH3-S Quadrant Layout ..........................................................................................34
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2.4
P64H2 Quadrant Layout ........................................................................................... 35
3
Baseboard Requirements ........................................................................................................... 37
3.1
Platform Stack-Up...............................................................................................................37
3.2
4
Platform Clock Routing Guidelines ........................................................................................... 39
4.1
Platform Clock ....................................................................................................................39
4.2
HOST_CLK Clock Group .................................................................................................... 42
4.2.1
HOST_CLK Clock Topology .................................................................................. 42
4.2.1.1
4.2.2
HOST_CLK General Routing Guidelines............................................................... 45
4.2.3
CK408 vs. CK408B Requirement .......................................................................... 46
4.3
CLK66 Clock Group ............................................................................................................ 47
4.3.1
CLK66 Skew Requirements................................................................................... 48
4.4
CLK33_ICH3-S Clock Group .............................................................................................. 50
4.5
CLK33 Clock Group ............................................................................................................ 50
4.6
CLK14 Clock Group ............................................................................................................ 52
4.7
USBCLK Clock Group ........................................................................................................53
4.8
Clock Driver Decoupling ..................................................................................................... 54
4.9
Clock Driver Power Delivery ............................................................................................... 55
5
System Bus Routing Guidelines ................................................................................................ 57
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5.1
Intel
Pentium
Design Recommendations.................................................................................................. 57
5.1.1
System Bus Signals ............................................................................................... 57
5.1.2
Processor System Bus Termination.......................................................................58
Design Guide
®
Intel
Pentium
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®
M Processor ................................................................................ 24
Architectural Features ............................................................................ 25
Packaging/Power ................................................................................... 25
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®
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E7501 Chipset ............................................................................................. 27
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E7501 Memory Controller Hub (MCH) ......................................... 27
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M Processor Quadrant Layout..................................................................32
BCLK Length Matching Requirements (mFCPGA) ................................ 45
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M Processor System Bus
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M Processor and Intel
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Technology ............................................ 25
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82801CA ICH3-S) Features....................... 28
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P64H2) Features .................................. 28
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E7501 Chipset Platform
Contents
3

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