Intel Pentium M Processor Design Manual page 143

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Table 78.
Dual-Slot Parallel Mode Hot-Plug Signals Table
Signal
HxSWITCHA
HxFAULTA#
HxPRSNT2A#
HxPRSNT1A#
HxM66ENA
HxPCIXCAP1A
HxPCIXCAP2A
HxRESETA#
HxGNLEDA
HxAMLEDA
HxBUSENA#
HxCLKENA#
HxPWRENA
HxSWITCHB
HxFAULTB#
HxPRSNT2B#
HxPRSNT1B#
HxM66ENB
HxPCIXCAP1B
HxPCIXCAP2B
HxRESETB#
HxGNLEDB
HxAMLEDB
HxBUSENB#
HxCLKENB#
HxPWRENB
NOTES:
1. HPx_SLOT [N] are pull-ups/pull-downs. When in dual-slot parallel mode, the external logic that decodes
the three-state value of PCIXCAP from the card must actively drive these signals to either logic 1 or logic 0
to overcome the value of the pull-up/pull-down, and must be tri-stated during reset and while the card is not
connected to avoid damaging the slot count value.
2. HPx_SID must be pulled down on the system board when configuring the Intel
parallel mode so that the LED for slot B on busses A and B remain off during reset.
3. The Intel P64H2 must drive this signal to the corresponding state shown in
set up for dual-slot parallel mode so that LEDs are in the appropriate state (off), and the Q-switches remain
disconnected. Note that the placement of the signals should be such that the value driven by the Intel
P64H2 in dual slot parallel mode is the same value it would have driven when in serial mode.
4. In both parallel modes, the BUSEN# and CLKEN# signals become active low instead of active high, as
they are during serial mode.
Design Guide
®
®
Intel
Pentium
M Processor and Intel
Multiplexed Intel
Type
Bus A
I
PAIRQ15]
I
PAIRQ14]
I
PA_IRQ13]
I
PAIRQ12]
I/O
PAIRQ11]
I
HPA_SLOT2]
I
HPA_SLOT1]
O
PAGNT5]
O
HPA_SOC
O
HPA_SOL
O
HPA_SORR#
O
HPA_SIL#
O
HPA_SOD
I
PAIRQ10
I
PAIRQ9
I
PAIRQ8
I
PAREQ5
I/O
PAREQ4
I
PAREQ3
I
HPA_SLOT0
O
HPA_SOR#
O
HPA_SIC
O
HPA_SID
O
PAGNT4
O
PAGNT3
O
HPA_SOLR
®
E7501 Chipset Platform
®
Intel
82870P2 (Intel P64H2)
®
P64H2 Pin
Ball #
Bus B
F4
PBIRQ15
E4
PBIRQ14
F5
PBIRQ13
E5
PBIRQ12
D5
PBIRQ11
D20
HPB_SLOT2
C20
HPB_SLOT1
E22
PBGNT5
A19
HPB_SOC
D19
HPB_SOL
A18
HPB_SORR#
C21
HPB_SIL#
B19
HPB_SOD
C5
PBIRQ10
B5
PBIRQ9
A5
PBIRQ8
F24
PBREQ5
F21
PBREQ4
F19
PBREQ3
A20
HPB_SLOT0
B18
HPB_SOR#
A23
HPB_SIC
B24
HPB_SID
F23
PBGNT4
F20
PBGNT3
C19
HPB_SOLR
®
P64H2 for dual-slot
Table 77
in case the system is
Note
Ball #
F1
E1
D1
C1
B1
D22
1
C23
1
G4
3
A24
3
C22
3
A22
3,
4
D24
3,
4
C24
3
F2
E2
D2
G3
H4
H2
B2
1
A21
3
A23
3
B24
2
H5
3,
4
H3
3,
4
B22
3
143

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