54 2-Dimms Per Channel Decoupling - Intel Pentium M Processor Design Manual

Figure 54. 2-DIMMs Per Channel Decoupling
Design Guide
® ®
Intel Pentium
12 Tantulum 100 µF Capacitors
Around The DIMMs
2 Vias Per Capacitor to
Internal Ground Plane
M Processor and Intel
Memory Interface Routing Guidelines
DIMM
DIMM
DIMM
DIMM
6 Ceramic 0.10 µF Caps
(0603) Between DIMM
Pairs
®
E7501 Chipset Platform
Dimm_Decoupling
93