Intel Pentium M Processor Design Manual page 251

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Table 96.
MCH Schematic Checklist (Sheet 4 of 4)
Checklist Items
1.2 V
(Hub Interface)
VCCA1_2
VCCAHI1_2
VCCACPU_1.2
NOTES:
1. The BREQ0# pin on the MCH corresponds to the BR0# pin on the processor.
2. The CPURST# pin on the MCH corresponds to the RESET# pin on the processor.
3. HA[35:3]# pins on the MCH correspond to A[31:3]# pins on the processor.
4. HD[63:0]# pins on the MCH correspond to D[63:0]# pins on the processor.
5. HADSTB[1:0]# pins on the MCH correspond to ADSTB[1:0]# pins on the processor.
6. HADSTBN[3:0]# pins on the MCH correspond to DSTBN[3:0]# pins on the processor.
7. HADSTBP[3:0]# pins on the MCH correspond to DSTBP[3:0]# pins on the processor.
8. HREQ[4:0]# pins on the MCH correspond to REQ[4:0]# pins on the processor.
9. The HTRDY# pin on the MCH corresponds to the TRDY# pin on the processor.
10.The MCH XERR# pin may be connected to the processor IERR# pin.
11. In HI1.0 mode, HI_STBF and HI_STBS used to be referred as HI_STB# and HI_STB respectively.
12.The DBI[3:0]# pins on the MCH correspond to DINV[3:0]# pins on the processor.
13.The HLOCK# pin on the MCH corresponds to the LOCk# pin on the processor.
Design Guide
®
®
Intel
Pentium
M Processor and Intel
Recommendations
Seven 0.1 µF caps.
RLC filters.
®
E7501 Chipset Platform
Schematic Checklist
Comments
Refer to
Section
11.4.4.
Refer to
Section
11.4.5.
251

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