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®
®
Intel
Pentium
M Processor and Intel
®
Intel
82870P2 (Intel P64H2)
8.2.9.2
Required Additional Logic
Serial mode requires a power switch to be used to turn the slot power on and off on all Hot-
Pluggable slots. Serial mode also requires the use of a bus and clock switch. In addition, serial
mode requires auto bus and clock disable logic to immediately disable the PCI bus and clock when
the power fault signal (from the power switch) goes active.
When the platform supports PME# or SMBus connections to the slots, isolation logic is required to
disconnect these signals before inserting or removing a card. See the PCI Hot-Plug Specification,
Revision 1.1, for implementation details.
8.2.9.3
Debounced Hot-Plug Switch Input
The switch inputs to the serialization/deserialization logic may require debouncing logic. This
depends on the logic used for serialization, and is left up to the individual designer.
8.2.9.4
Comparator Circuit for PCIXCAP1/PCIXCAP2 Pins
A comparator circuit is required for properly decoding the PCI/PCI-X capability of the slot. Refer
to the PCI Local Bus Specification, Revision 2.2, for this circuit. An example of this circuit is also
contained in the reference schematics.
8.2.9.5
HPx_SLOT[2:0]
The HPx_SLOT[2:0] pins are pull-ups/pull-downs that are used to determine the slot count and
mode of operation for the Intel
proper slot count value. See
8.2.9.6
Stutter Logic for Implementing Fewer Than Six Slots
The serialized input/output data stream effectively stutters around the unused bit positions
corresponding with the number of Hot-Plug slots determined by HPx_SLOT[2:0]. This reduces the
amount of logic required to implement fewer than six slots. When HPx_SLOT[2:0] is strapped to
enable four Hot-Pluggable slots, bit positions 4 and 5 would be skipped. Refer to
example of this. Note that this concept also applies to the output data stream as well.
146
®
E7501 Chipset Platform
®
P64H2 Hot-Plug controller. These pins should be strapped to the
Table
74.
Figure 102
for an
Design Guide
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