Intel Pentium M Processor Design Manual page 230

® ®
Intel Pentium M Processor and Intel
High-Speed Design Concerns
Figure 161. Illustration of PLC Length Matching
The length matching equation is based on the PLC concepts explained in the previous section. The
total pad-to-pad length is represented by
by adding the total lengths as illustrated in
Equation 5. Processor/MCH Length Matching
SignalX
The PLC length parameter is calculated using
Equation
Equation
Equation 6. Processor to MCH PCB Length Definition
SignalX
SignalX
Processor to MCH PCB Length
meet the specific system bus routing guidelines documented in
Guidelines"
processor and MCH package effects.
Using this relationship, if
MCH PCB Length
Equation 7. SignalY Processor /MCH Motherboard Lengths
SignalY
The equation operates by first starting with the known total motherboard length for Signal X and
then subtracting Signal X's PLC compensations. The PLC compensation for Signal Y are then
added.
230
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E7501 Chipset Platform
P rocessor
Longest P ackage
T race Length
D ie P roc D elta
P ad
Shortest P ackage
Trace Length
Processor Die Pad-to-MCH Die Pad
+ SignalX
Processor PLC
5, the total motherboard length for Signal X in the Processor/MCH path is defined in
6.
Processor to MCH PCB Length
+ Shortest Signal
should be chosen to allow all signals in the same signal group to
of this document. The PLC adjust the motherboard trace lengths to account for the
SignalX
Processor to MCH PCB Length
may be determined using
Processor to MCH PCB Length
– SignalX
Processor PLC
Shortest Signal
P rocessor to M C H
P C B Length
C om ponent P in
Shortest Signal
P roc P LC P rocessor to M C H
P C B Length
P rocessor
D elta
Equation 5 for the driver/receiver path and may be derived
Figure 161.
= SignalX
Processor Package Length
+ SignalX + SignalX
MCH PLC
Equation 4. Extracting specific parameters from
= SignalX
MCH PLC
Processor to MCH PCB Length
are known, then
Equation 7 respectively.
= SignalX
Processor to MCH PCB Length
+ SignalY
MCH PLC
M CH
Longest P ackage
T race Length
D ie
M C H D elta
C om ponent P in P ad
Shortest P ackage
M CH PLC
T race Length
M CH
D elta
MCH Package Length
Section 5, "System Bus Routing
SignalY
Processor to
Design Guide