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20.9.5.18 Queue Manager Queue Pending Register 4 (PEND4)
The queue manager queue pending register 4 (PEND4) can be read to find the pending status for
queues 159 to 128. It does not support byte accesses. This register is shown in
described in
Table
Figure 20-135. Queue Manager Queue Pending Register 4 (PEND4)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-150. Queue Manager Queue Pending Register 4 (PEND4) Field Descriptions
Bits
Field Name
31-0
qpend4
20.9.5.19 Queue Manager Memory Region R Base Address Register (QMEMRBASEr)
The queue manager memory region R base address register (QMEMRBASEr) is written by the Host to
set the base address of memory region R. This memory region stores a number of descriptors of a
particular size as determined by the memory region R control register. It does not support byte
accesses. R ranges from 0 to 15.
The queue manager memory region R base address register is shown in
in
Table
20-151.
Figure 20-136. Queue Manager Memory Region R Base Address Register (QMEMRBASEr)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-151. Queue Manager Memory Region R Base Address Register (QMEMRBASEr) Field
Bits
Field Name
31-0
reg
SPRUGX9 – 15 April 2011
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Preliminary
20-150.
Description
This field indicates the queue pending status for queues[159:128]
Description
This field contains the base address of the memory region R.
© 2011, Texas Instruments Incorporated
qpend4
R-0h
reg
R/W-0h
Descriptions
Registers
Figure 20-135
and
Figure 20-136
and described
Universal Serial Bus (USB)
0
0
1937
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