Sd Detection Procedure - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Memory Booting
21.7.4.4 Initialization and Detection
The ROM Code initializes the memory device or card connected on MMC interface using the standard
High-Voltage range (3.0V). If neither memory device nor card is detected then the ROM Code carries
on to the next booting device. The standard identification process and Relative Card Address (RCA)
assignment are used. However, the ROM Code assumes that only one memory or card is present on
the bus. This first sequence is done using the CMD signal that is common to SD devices.
SD standards detail this phase as initialization phase. ACMD41 is only supported by the SD standard.
The ROM Code first sends a CMD1 to the device and gets a response only if an MMC device is
connected. If no response is received then ACMD41 (ACMD41 is made out of CMD55 and ACMD41) is
sent and a response is expected from an SD device. If no response is received then it is assumed that
no device is connected and the ROM Code exits the SD Booting procedure with FAIL. This is detection
procedure is shown in
As previously mentioned, the contents of an SD card may be formatted as raw binary or within a FAT
filesystem. eSD devices only support raw mode. The ROM Code reads out raw sectors from image or
the booting file within the file system and boots from it.
21.7.4.5 SD Read Sector Procedure in Raw Mode
In raw mode the booting image can be located at one of the four consecutive locations in the main
area: offset 0/20000h (128KB)/40000h (256KB)/60000h (384KB). For this reason a booting image shall
not exceed 128KB in size. However it is possible to flash a device with an image greater than 128KB
starting at one of the aforementioned locations. Therefore the ROM Code does not check the image
size. The only drawback is that the image will cross the subsequent image boundary.
The raw mode is detected by reading sectors #0, #256, #512, #768. The content of these sectors is
then verified for presence of a TOC structure as described in
Device, a Configuration Header (CH) must be located in the first sector followed by a GP header. The
CH might be void (only containing a CHSETTINGS item for which the Valid field is zero).
2014
ROM Code Memory and Peripheral Booting
Preliminary
Figure
21-18.
Figure 21-18. SD Detection Procedure
MBR Detection
No
0xAA55 Signature
at Offset 0x01FE?
Yes
Partition Type
is 0x00?
No
Is Partition
No
Within
Physical
Boundaries?
Yes
Failed
Success
© 2011, Texas Instruments Incorporated
Yes
Are All Fields
0x00?
No
Section
21.10. In the case of a GP
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www.ti.com
SPRUGX9 – 15 April 2011

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