Nand Invalid Blocks Detection - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Bad block verification. Invalid blocks are blocks which contain invalid bits whose reliability cannot
be guaranteed by the manufacturer. Those bits are identified in the factory or during the
programming and reported in the initial invalid block information located in the spare area on the 1st
and 2nd page of each block. Since the ROM Code is looking for an image in the first four blocks, it
must detect block validity status of these blocks. Blocks which are detected as invalid are not
accessed later on. Blocks validity status is coded in the spare areas of the first two pages of a block
(first byte equal to FFh in 1st and 2nd pages for an 8 bits device / first word equal to FFFFh in 1st
and 2nd page for a 16-bit device).
Figure 21-13
depicts the invalid block detection routine. The routine consists in reading spare areas
and checking validity data pattern.
Read Invalid Blocks
Read 1st and 2nd Page
0xFF (0xFFFF for
Clear Invalid Block Flag
SPRUGX9 – 15 April 2011
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Preliminary
Figure 21-13. NAND Invalid Blocks Detection
Information
Spare Sectors
Invalid Block
Information
Yes
16 Bit Devices)
No
© 2011, Texas Instruments Incorporated
Set Invalid Block Flag
ROM Code Memory and Peripheral Booting
Memory Booting
2009

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