Xip Timings Parameters; Pins Used For Nor Boot - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Memory Booting
Parameter
twr
trd
tCEon
tCEoff
tADVon
tADVoff
tOEon
tWEon
trddata
tOEoff
tWEoff
The one clock cycle is 18.182 ns which corresponds to 55 MHz frequency.
There is no specific identification routine executed prior to booting from an XIP device.
The list of pins that are configured by the ROM in the case of NOR boot mode are listed in
Note that all the pins might not be driven at boot time. The decision as to which pins need to be driven
is done based on the type of NOR flash selected.
Signal name
cs0
advn_ale
oen_ren
be0n_cle
Wen
Wait
Clk
ad0 - ad15
a0
a1
a2
a3
a4
a5
a6
a7
a8
a9
a10
a11
2002
ROM Code Memory and Peripheral Booting
Preliminary
Table 21-9. XIP Timings Parameters
Description
write cycle period
read cycle period
CE low time
CE high time
ADV low time
ADV high time
OE low time
WE low time
data latch time
OE high time
WE high time
Table 21-10. Pins Used for NOR Boot
Pin used in XIP mode
gpmc_cs0
gpmc_advn_ale
gpmc_oen_ren
gpmc_be0n_cle
gpmc_wen
gpmc_wait
gpmc_clk
gpmc_ad0 - gpmc_ad15
gpmc_a0
gpmc_a1
gpmc_a2
gpmc_a3
gpmc_a4
gpmc_a5
gpmc_a6
gpmc_a7
gpmc_a8
gpmc_a9
gpmc_a10
gpmc_a11
© 2011, Texas Instruments Incorporated
www.ti.com
Value [clock cycles]
17
17
1
16
1
2
3
3
15
16
15
Table 21-10.
SPRUGX9 – 15 April 2011
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