Nand Page Mapping And Ecc: Per-Sector Schemes - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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5.2.4.12.3.3.1 Per-Sector Spare Mappings
In these schemes
the spare area. The spare area of each sector is composed of:
• ECC, which must be located after the data it protects
• other data, which may or may not be protected by the sectors ECC
Figure 5-38. NAND Page Mapping and ECC: Per-Sector Schemes
M1
Per-sector spares
Spares covered by sector ECC
per sector ECC mapping.
Mode Size0
Write 1 P
Read 1 P+E
M2
Per-sector spares
Spares covered by sector ECC
per sector, left-padded ECC.
Mode Size0
Write 1 P
Read 10 P
M3
Per-sector spares
Spares covered by sector ECC,
ECC not right-aligned.
Mode Size0
Write 1 P
Read 1 P+E
M4
Per-sector spares
Spares not covered by ECC,
ECC right-aligned per sector.
Mode Size0
Write 2 U+E
Read 2 U
SPRUGX9 – 15 April 2011
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Preliminary
(Figure 5-38), each 512-byte sector of the main area has its own dedicated section of
Sector data
Data0
Size1
512 bytes
E 0
0 0
Sector data
Data0
Size1
512 bytes
1+E 0
E 0
Sector data
Data0
Size1
512 bytes
E+U 0
U 0
Sector data
Data0
Size1
512 bytes
0 0
E 0
© 2011, Texas Instruments Incorporated
Sector data Sector spares
Data1 Prot0
512 bytes P
1 0 inactive
size0
1 0
size0
Sector data Sector spares
Data1 Prot0 Pad
512 bytes P 1
1 0 inactive
size0
1 0 i.
size0 1
Sector data Sector spares
Data1 Prot0 Ecc0
512 bytes P E
1 0 inactive
size0 size1
1 0
size0
Sector data Sector spares
Data1 Unprot0
512 bytes U
1
size0
1 inactive
size0
General-Purpose Memory Controller (GPMC)
Architecture
Sector spares
Ecc0 Prot1 Ecc1
E P E
1 inactive
size1 size0 size1
1
size0
Sector spares
Ecc0 Prot1 Pad Ecc1
E P 1 E
1 inactive
size1 size0 size1
0 1 i. 1
size1 size0 1 size1
Sector spares
U0 Prot1 Ecc1
U P E
1 inactive
size0 size1
i. 1
s1 size0
Sector spares
Ecc0 Unprot1 Ecc1
E U E
inactive
size0
0 inactive 1
size1 size0 size1
U1
U
i.
s1
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