Access To Cyclic Data - Mitsubishi Electric QJ71GF11-T2 User Manual

(a) Access to cyclic data
When link devices are accessed, the integrity of 32-bit data can be assured by satisfying the following
conditions.
• When directly accessing link devices:
The start device number of RWr/RWw is multiples of 2.
The number of points assigned to RWr/RWw is multiples of 2.
Access by using start
device No. which is a
multiples of 2 and
in 2-word (32-bit) units
• When accessing buffer memories:
Access using the DMOV instruction
The start address of the buffer memory is multiples of 2.
For data assurance of more than 32 bits, use the block data assurance per station or interlock programs.
CPU module
Device
0
H 2 words
(32 bits)
1
H
2
H
2 words
(32 bits)
3
H
Link refresh
4
H
2 words
5 (32 bits)
H
6
H
2 words
(32 bits)
7
H
DMOV instruction
Master/local module
RWr,RWw
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
2 words
(32 bits)
Master/local module
RWr,RWw
0
H
2 words
(32 bits)
1
H
2
H
2 words
Access by using start
(32 bits)
3
H
address No. which is a
4 multiple of 2 and
H
2 words
in 2-word (32-bit) units
(32 bits)
5
H
6
H
2 words
(32 bits)
7
H
CHAPTER 8 FUNCTIONS
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