Differences From Link Refresh; Shortening The Link Refresh Time; Shortening The Transmission Delay Time - Mitsubishi Electric QJ71GF11-T2 User Manual

(3) Differences from link refresh

Number of steps
Processing speed (LD B0
Data reliability
*1 The given value is for the Q06UDEHCPU.
*2 When "Block Data Assurance per Station" is enabled (
*3 When the conditions for the secured 32-bit data are satisfied (
(4) Shortening the link refresh time and transmission delay time
(a) Shortening the link refresh time
Remove infrequently used link devices from the link refresh range, and directly read or write the corresponding
data using link direct devices. This reduces the number of the link refresh points to the CPU module, resulting
in a shorter link refresh time. (
(b) Shortening the transmission delay time
Because the link direct device allows direct reading or writing of data to the link devices of the master /local
module at the time of the instruction execution, the transmission delay time can be shortened.
Remark
Link refresh is executed in END processing of the sequence scan of the CPU module.
(5) Precautions
For cyclic data assurance of more than 32 bits, refer to
132
Item
1 step
*1
High speed (0.0095µs)
)
Station-based or 32-bit units
Page 127, Section 8.1.2)
Access method
Link refresh
*2*3
Page 134, Section 8.1.5)
Page 134, Section 8.1.5)
Page 134, Section 8.1.5.
Direct access
2 steps
Low speed (10 to 100µs)
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