Program Counter - Intel MCS48 User Manual

SINGLE
COMPONENT
SYSTEM
A
11
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
Conventional Program Counter
•
Counts 000H
to
7FFH
•
Overflows
7FFH
to
000H
PROGRAM COUNTER
SAVED
IN
STACK STACK POINTER
'
.
CY
AC
FO BS
1
s
2
Si
So
LSB
CY
CARRY
AC AUXILLARY CARRY
FO
FLAG
BS
REGISTER BANK SELECT
PROGRAM
STATUS
WORD
(PSW)
110
101
100
011
010
001
PSW
J
PC
8
_n
000
PC/W
|
PCr>3
R23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
R8
MSB
LSB
PROGRAM COUNTER
STACK
2.1.7
Program
Status
Word
An
8-bit
status
word which can be loaded
to
and from
the
accumulator
exists called
the
Program
Status
Word
(PSW).
The
accom-
panying
figure
shows
the information available
in
the
word.
The Program
Status
Word
is
actually
a
collection of
flip-flops
throughout
the
machine which can be
read
or written
as a
whole.
The
ability
to write to
PSW
allows
for
easy
restoration of
machine
status
after
a
power
down
sequence.
The
upper
four
bits
of
PSW
are stored
in
the
Program Counter
Stack with every
call
to
subroutine or
interrupt
vector
and
are optionally
restored
upon
return with
the
RETR
instruction.
The
RET
return instruction
does
not
update
PSW.
The
PSW
bit
definitions
are
as
follows:
Bits
0-2:
Stack
Pointer
bits
(S
,
S^ S
2
)
Bit 3:
Not used
("1"
level
when
read)
Working
Register
Bank
Switch
Bit
(BS)
=
Bank
1
=
Bank
1
Flag
bit
(F0)
user
controlled
flag
which can be comple-
mented
or cleared,
and
tested
with the conditional
jump
in-
struction
JF0.
Auxiliary
Carry (AC) carry
bit
generated by an
ADD
instruc-
tion
and used by
the
decimal
adjust instruction
DA
A.
Carry (CY)
carry
flag
which
indicates that
the previous
operation
has
resulted
in
over-
flow of
the accumulator.
2.1.8
Conditional
Branch
Logic
The
conditional
branch
logic
within
the pro-
cessor enables several conditions internal
and
external to
the
processor
to
be
tested
by
the
users program.
By
using the conditional
jump
instruction
the
following conditions
can
effect
a
change
in
the
sequence
of
the
program
execution.
Bit 4:
Bit
5:
Bit 6:
Bit 7:
2-6