Intel MCS48 User Manual page 68

Family of single chip microcomputers
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THE EXPANDED
MCS-48™
SYSTEM
3.0
Summary
3-1
3.1
Expansion
of
Program
Memory
3-1
3.2
Expansion
of
Data
Memory
3-4
3.3
Expansion
of
Input/Output
3-5
3.4
Multi-Chip
MCS-48
Systems
3-9
3.5
Memory
Bank
Switching
3-10
3.6
Control Signal
Summary
3-11
3.7
Port Characteristics
3-11
MCS-48™
CYCLE
TIMING
FOR EXTERNAL
MEMORY
ALE
PSEN
1
1
L
J
PC
ADDRESS
PC
>
o
N
ADDRESS
)
N
IF
M
<1
EXTERNAL
PROGRAM
EMORY
FETCH
BUS
~<
~<
~<
<
»
INSTRUCTIO
INSTRUCTIC
ADDRESS
WRITE
READ
PORT
I/O
2023
Y
ADDRESS
Y
PORT
I/O
Y
ADDRESS
Y
PORT
I/O
*
PC
IF
EXTERNAL
.
»
PROGRAM MEMORY
FETCH
'
RD
r~
WR
r~

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