Intel MCS48 User Manual page 344

8259A
SUMMARY OF
8259A
Intt. •
Mnemonic AO
D7
M
DS
04 03 02 01 DO
1
ICW1 A
A7 A6 A5
1 1
1
2
ICW1 B A7
A6 A5
1 1 1
1
3
ICW1 C
A7 A6 A5
1
1
4
ICW1
A7
A6 A5
1
1 1
5
ICW1
E A7 A6
1
1
6
ICW1
F
A7
A6
1
1 1
7
ICW1 G
A7 A6
1
J
8
ICW1 H
A7
A6
1 1
9
ICW1
I
A7
A6
A5
1
1 1 1
>
10
ICW1
J
A7 A6 A5
1 1 1 1
11
ICW1 K
A7 A6 A5
1
1
12
ICW1
L
A7
A6 A5
1
1 1
13
ICW1
M
A7 A6
1
1
14
ICW1 N
A7 A6
1 1 1
15
ICW1
A7 A6
1
1
t
16
ICW1
P A7 A6
1 1
17
ICW2
A15 A14 A13 A12
A11 A10 A9 A8
18
ICW3 M
S7 S6 S5 S4
S3 S2 S1 SO
19
ICW3
S
S2
S1
SO
20
ICW4
A
21
ICW4
B
1
22
ICW4 C
1
23
ICW4
1 1
24
ICW4
E
1
25
ICW4 F
1 1
26
ICW4
G
1 1
27
ICW4 H
1
1 1
28
ICW4
I
29
ICW4
J
1
30
ICW4
K
1
31
ICW4
L
1 1
32
ICW4
M
1
33
ICW4 N
1 1
34
ICW4
1 1
35
ICW4
P
1 1
1
36
ICW4
NA
37
ICW4
NB
\
38
ICW4 NC
1
o
39
ICW4
NO
1
)
40
ICW4
NE
1
41
ICW4
NF
1
42
ICW4
NG
1 1
43
ICW4
NH
1 1
1
44
ICW4
Nl
45
ICW4 NJ
1
46
ICW4 NK
1
o
>
47
ICW4 NL
1 1
48
ICW4
NM
1
49 ICW4
NN
1
1
50
ICW4
NO
1 1
51
ICW4 NP
1 1
1
/
MO
52
0CW1 M7
M6 M5
M4 M3 M2
M1
53
0CW2
E
1
54
0CW2
SE
1 1
L2
u
LO
55
0CW2
RE
1 1
56
0CW2
RSE
1
1 1
L2 L1
LO
57
0CW2
R
1
58
0CW2
CR
59
0CW2
RS
1 1
L2
L1
LO
60
0CW3
P
1 1
61
0CW3
RIS
1 1 1
INSTRUCTION SET
Operation Description
Byte
1
Initialization
No ICW4
Required
Byte
1
Initialization
ICW4
Required
Format =
4,
single,
edge
triggered
Format =
4,
single,
level
triggered
Format =
4,
not single,
edge
triggered
Format =
4,
not single,
level trigcered
Format =
8,
single,
edge
triggered
Format =
8,
single, level triggered
Format =
8,
not single,
edge
triggered
Format =
8,
not single, level triggered
Format =
4,
single,
edge
triggered
Format
=
4,
single, level triggered
Format
=
4,
not single,
edge
triggered
Format =
4,
not
single, level triggered
Format
=
8,
single,
edge
triggered
Format =
8,
single, level
triggered
Format =
8,
not single,
edge
triggered
Format
=
8,
not
single, level
triggered
Byte 2
initialization
Byte 3
initialization
—
master
Byte
3
initialization
—
slave
No
action, redundant
Non-buffered mode, no AEOI, MCS-86
Non-buffered mode, AEOI, MCS-80/8b
Non-buffered
mode,
AEOI,
MCS-86
No
action,
redundant
Non-buffered
mode, no AEOI, MCS-86
Non-buffered mode, AEOI, MCS-80/85
Non-buffered
mode.
AEOI,
MCS-86
Buffered
mode,
slave,
no AEOI, MCS-80/85
Buffered
mode,
slave,
no
AEOI,
MCS-86
Buffered mode,
slave,
AEOI, MCS-80/85
Buffered mode,
slave,
AEOI, MCS-86
Buffered
mode,
master, no AEOI, MCS-80/85
Buffered
mode,
master,
no AEOI, MCS-86
Buffered
mode,
master, AEOI, MCS-80/85
Buffered mode, master, AEOI,
MCS-86
Fully nested
mode, MCS-80,
non-buffered,
no AEOI
ICW4
NB
through
ICW4
NO
are identical to
ICW4
B through
ICW4 D
with the addition
of
Fully
Nested
Mode
Fully
Nested Mode,
MCS-80/85, non-buffered,
no AEOI
ICW4
NF
through
ICW4 NP
are identical to
ICW4
F through
ICW4
P
with the addition of
Fully
Nested
Mode
Load
mask
register,
read
mask
register
Non-specific EOI
Specific EOI.
L0-L2 code
of IS
FF
to
be reset
Rotate
at
EOI
Automatically
(Mode
A)
Rotate
at
EOI (mode
B)
L0-L2 code
of line
Set Rotate
A FF
Clear Rotate
A FF
Rotate
priority
(mode
B)
independently of
EOI
Poll
mode
Read
IS register
8-54