Intel MCS48 User Manual page 392

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8291
Appendix
A
MODIFIED STATE
DIAGRAMS
Figure
A.1
presents
the interface function
state
diagrams.
It
is
derived
from IEEE
Std. state
diagrams,
with the
following
changes:
A.
Controller function omitted.
B.
Addressing
modes
included
in
T,L
state
diagrams.
Note
that
in
Mode
3,
MSA,
OSA
are
generated only
after
secondary address
validity
check by
the
microprocessor
(APT
interrupt).
C.
All
remote
messages
sent
true
in
each
state
are
indicated.
D.
All
remote
multiline
messages decoded
are condi-
tioned
by
ACDS. The
multiplication
by
ACDS
is
not
drawn
to simplify
the
diagrams.
E.
The symbol
e
indicates:
1.
When
event
X
occurs, the function
will
return to
state
S.
2.
X
overrides
any
other
transition
condition
in
the
function.
Statement
2 simplifies the
diagram, avoiding
the
explicit
use
of
X
to
condition
all
transitions
from
S
to
other
states.
SH
|
ATN+
F1
(WITHIN
t
2
)
F1 =
TACS
+
SPAS
I
J
THIS
TRANSITION WILL
NEVER
OCCUR UNDER
NORMAL
OPERATION.
F2
-
ATN
+
LACS
+
LADS
F3
=
ATN
+ rdy
T3'
=
T3
CPT
APT
Figure
A.1.
8291
State
Diagrams
(Continued
next
page)
8-102
00229A

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