Intel MCS48 User Manual page 274

8212
VIM.
8085A Low-Order
Address
Latch
The 8085A
microprocessor uses
a multiplexed address/
data
bus
that contains
the low order
8-bits of
address
information during the
first
part of a
machine
cycle.
The
same bus
contains data
at
a
later
time
in
the
cycle.
An
address
latch
enable (ALE)
signal
is
provided by
the
8085A
to
be used by
the 821 2
to latch the
address so
that
it
may
be
available through
the
whole machine
cycle.
Note:
In this
configuration, the
MODE
input
is
tied high,
keeping
the 8212's output
buffers turned
on
at
all
times.
Do
Di
D
2
D
3
D
4
D
5
D
6
D
7
—
DATA
BUS
Vcc
111
Dh
STB
Dd
8212
CLR
DS,
MD
DS,
4
A
b
A,
8 *A
2
IP A
3
LOW ORDER
lb
t
A
4
ADDRESS
BUS
17
-A
R
19
-A
6
21
1
A
7
113
T
v
cc
7-36