Intel MCS48 User Manual page 211

iny
8755A
16,384-BIT
EPROM
WITH
I/O
Directly
Compatible
with
8085A
CPU
2048
Words
x 8
Bits
Single
+ 5V Power
Supply
(V cc
)
U.V.
Erasable
and
Electrically
Reprogrammable
Internal
Address
Latch
2
General Purpose
8-Bit I/O Ports
Each
I/O
Port Line Individually
Programmable
as
Input or
Output
Multiplexed
Address and
Data
Bus
40-Pin
DIP
The
Intel®
8755A
is
an
erasable
and
electrically
reprogrammable
ROM
(
EPROM
)
and
I/O chip
to
be used
in
the
MCS-85 T
"
microcomputer
system.
The
EPROM
portion
is
organized
as
2048 words by
8
bits.
It
has
a
maximum
access
time
of
450 ns
to
permit use
with
no
wait states
in
an 8085A CPU.
The
I/O
portion consists
of 2 general
purpose
I/O ports.
Each
I/O port
has 8
port
lines,
and each
I/O port
line
is
individu-
ally
programmable
as input or output.
PIN
CONFIGURATION
BLOCK DIAGRAM
PROG AND CE,C
1
40
D V
CC
CE
2
C 2
39
D
PB
7
CLK
c 3 38
II
PB
6
RESET
C
4 37 H
PB
5
VodC
5 36 D
PB
4
READY
C 6
35
I]
PB
3
IO/M
C
34
H
PB
2
iOR
C
8 33
D
PB
i
RD C
9 32
D
PB
o
iow
C
10
8755A
31
D
PA
7
ALE C
11 30
D
PA
6
AD C
12 29
D
PA
5
A°iC
13 28
HPA
4
ADjfJ
14 27
D
PA
3
AD
3
C
15 26
JPA
2
A0
4 [I
16 25
D
PA
i
AD
s[I
17 24
3
PA
o
AD
6
C 18 23 D
A
10
AD
7
C 19 22
D A
9
V «C
20
21
D
A
8
A
e~iocL
ce
2
-
IO/M-
ALE-
RD-
ioW-
RESET-
iOR-
«
5
^PORTBK
C°v
PfV
-J
l
t
L
CE,
1 I
V.
V
cc
(
+ 5V)
-V
ss
(0V)
«m
CORPORATION ASSUMES NO
RESPONSIBILITY FOR THE USE Of ANY
CIRCUITRY
OTHER THAN CBCWTRY
EMBODIED
IN
AN
INTEL PRODUCT.
NO
OTHER
CIRCUIT
PATENT
LICENSES ARE
IMPLIED
o
WTEL CORPORATION, 1979
6-59