Intel MCS48 User Manual page 220

81 55/81 56/81 55-2/81
56-2
8155/8156 PIN
FUNCTIONS
S ymbol
RESET
(input)
ADo-7
(input)
CEorCE
(input)
RD
(input)
WR
(input)
Function
Pulse provided
by
the
8085A
to
ini-
tialize
the
system (connect
to
8085A
RESET
OUT).
Input high
on
this line
resets the
chip and
initializes
the
three I/O ports
to
input
mode. The
width
of
RESETpulse
should
typically
be two
8085A
clock cycle
times.
3-state
Address/Data
lines
that inter-
face with the
CPU
lower
8-bit
Ad-
dress/Data Bus.
The
8-bit
address
is
latched
into
the
address
latch inside
the
8155/56 on
the
falling
edge
of
ALE. The address can be
either for
the
memory
section or the I/O section
depending on
the
IO/M
input.
The
8-bit
data
is
either written into
the
chip
or read
from the
chip,
depending
on
the
WR
or
RD
input signal.
Chip
Enable:
On
the 8155,
this
pin
is
CE
and
is
ACTIVE LOW. On
the 81
56,
this
pin
is
CE
and
is
ACTIVE
HIGH.
Read
control: Input
low on
this line
with the
Chip Enable
active
enables
and ADo-7
buffers.
If
IO/M
pin
is
low,
the
RAM
content
will
be read out
to
the
AD
bus.
Otherwise the content
of the selected I/O port or
command/
status registers
will
be
read to
the
AD
bus.
Write
control:
Input
low on
this line
with the
Chip Enable
active
causes
the data
on
the
Address/Data bus
to
be
written to
the
RAM
or I/O ports
and
command/status
register
depending
on
IO/M.
S ymbol
ALE
(input)
IO/M
(input)
PA
-7(8)
(input/output)
PBo-7(8)
(input/output)
PCo-5(6)
(input/output)
TIMER
IN
(input)
TIMER
OUT
(output)
Vcc
Vss
Function
Address Latch Enable: This
control
signal latches
both the add
ress
on
the
ADo-7
lines
and
the state of the
Chip
Enable
and IO/M
into
the chip
at
the
falling
edge
of
ALE.
Selects
memory
if
low
and
I/O
and
command/status
registers
if
high.
These
8 pins are
general
purpose
I/O
pins.
The
in/out direction
is
selected
by
programming
the
command
register.
These
8 pins are general
purpose
I/O
pins.
The
in/out direction
is
selected
by
programming
the
command
register.
These
6 pins
can function as either
input
port,
output
port,
or as control
signals
for
PA
and
PB.
Programming
is
done through
the
command
reg-
ister.
When
PCo-5 are
used
as control
signals,
they
will
provide the
fol-
lowing:
PCo
—
A INTR
(Port
A
Interrupt)
PCi
—
ABF
(P ort
A
Buffer
Full)
PC2
—
A STB
(Port
A
Strobe)
PC3
—
B INTR
(Port
B
Interrupt)
PC
4
PC
5
B BF
(Port
B
Buffer
Full)
B
STB
(Port
B
Strobe)
Input
to
the counter-timer.
Timer
output. This
output can be
either a
square
wave
or a pulse de-
pending on
the timer
mode.
+5
volt
supply.
Ground
Reference.
6-68