Intel MCS48 User Manual page 314

Family of single chip microcomputers
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8255A/8255A-5
CONTROL
WORD
XXX
D
5
D„
D
3
D
2
D,
D
BIT
SET/RESET
1=SET
0= RESET
BIT
SET/RESET
FLAG
=
ACTIVE
Figure
5.
Bit
Set/Reset
Format
When
Port
C
is
being used
as
status/control for Port
A
or
B,
these
bits
can be
set
or
reset
by
using the
Bit
Set/Reset
op-
eration
just as
if
they
were
data
output
ports.
Interrupt
Control
Functions
When
the
8255A
is
programmed
to
operate
in
mode
1
or
mode
2,
control signals are
provided
that
can be used
as
interrupt
request inputs
to
the
CPU. The
interrupt
re-
quest
signals,
generated from
port C,
can be
inhibited or
enabled by
setting or resetting the
associated
INTE
flip-
flop,
using the
bit
set/reset
function
of port C.
This function allows the
Programmer
to disallow or allow
a
specific
I/O device to interrupt the
CPU
without
affecting
any
other
device
in
the
interrupt structure.
INTE
flip-flop
definition:
(BIT-SET)
-
INTE
is
SET
-
Interrupt
enable
(BIT-RESET)
-
INTE
is
RESET
-
Interrupt disable
Note:
All
Mask
flip-flops
are
automatically
reset
during
mode
selection
and
device Reset.
Operating
Modes
MODE
(Basic Input/Output). This functional configura-
tion
provides simple
input
and
output operations
for
each
of
the three
ports.
No
"handshaking"
is
required,
data
is
simply
written to or
read
from
a specified
port.
Mode
Basic
Functional
Definitions:
Two
8-bit
ports
and
two
4-bit ports.
Any
port can
be
input or output.
• Outputs
are latched.
Inputs
are
not
latched.
16
different
Input/Output
configurations
are possible
in
this
Mode.
V
X
X
/
(
X
K
X
>
MODE
(Basic
Input)
\
J
c
)E
-•WD"
K
X
-'WB
-\
K
MODE
(Basic Output)
8-24
00744A

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