Intel MCS48 User Manual page 193

Family of single chip microcomputers
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8022
INSTRUCTION SET
Hexadecimal
Mnemonic
Description
Byt
es
Cycle
Opcode
ADD
A,R
r
Add
register to
A
1
1
68-6F
ADD
A,@
Ft
Add
data
memory
to
A
1
1
60-61
ADD
A,#data
Add
Immediate
to
A
2
2
03
ADDC
A,R
r
Add
register with carry
1
1
78-7F
ADDC
A,@
R
Add
data
memory
with
1
carry
1
70-71
ADDC
A,#data
Add
immediate
with
2
carry
2
13
ANL
A,R
r
And
register
to
A
1
58-5F
ANL A,@
R
And
data
memory
to
A
1
50-51
ANL
A,#data
And
immediate
to
A
2
2
53
ORL
A,R
r
Or
register to
A
1
48-4F
ORL A,@R
Or
data
memory
to
A
1
40-41
w
ORL
A,#data
Or immediate
to
A
2
2
43
| XRLA,R
r
Exclusive
Or
register
1
D8-DF
3
|
XRL A,@
R
to
A
Exclusive
Or
data
1
D0-D1
o
<
memory
to
A
XRL
A,#data
Exclusive
Or immediate
2
to
A
2
D3
INC
A
Increment
A
1
17
DEC
A
Decrement A
1
07
CLR
A
Clear
A
1
27
CPL A
Complement A
1
37
DA
A
Decimal
adjust
A
1
57
SWAP
A
Swap
nibbles
of
A
1
47
RL A
Rotate
A
left
1
E7
RLC
A
Rotate
A
left
through
1
carry
F7
RR A
Rotate
A
right
1
77
RRC
A
Rotate
A
right
through
1
carry
67
IN A,
P
p
Input port to
A
2
08,09,0A
OUTL
P
p
A
Output
A
to port
2
90,39,
3A
g.
MOVD
A,P
p
Input
expander
port
2
0C-0F
d
to
A
£
MOVD
P
p
,A
Output
A
to
expander
1
2
3C-3F
a
port
- ANLD
P
p
,A
And A
to
expander
port
1
2
9C-9F
ORLD
P
p
,A
Or
A
to
expander
port
2
8C-8F
0>
£
INC
R
r
Increment
register
1
1
18-1F
a
INC
@
R
Increment data
memory
1
1
10-11
JMP
addr
Jump
unconditional
2
2
04,24,44,64,
84,A4,C4,E4
JMPP
@
A
Jump
indirect
1
2
B3
DJNZ
R.addr
Decrement
register
and
2
2
E8-EF
Q
jump
on
R
not
zero
JC
addr
Jump
on
carry=1
2
2
F6
JNC
addr
Jump
on
carry=0
2
2
E6
JZ addr
Jump
on
A
zero
2
2
C6
JNZ
addr
Jump
on
A
not
zero
2
2
96
Description
Hexadecimal
Bytes
Cycle
Opcode
JTO
Jump
on
T0=1
2
2
36
JNTO
Jump
on
T0=0
2
2
26
JT1 addr
Jump
on
T1
=
1
2
2
56
JNT1
addr
Jump
on
T1=0
2
2
46
JTF
addr
Jump
on
timer
flag
2
2
16
s CALL
addr
Jump
to
subroutine
S,
CLRC
i?
CPLC
Clear
carry
Complement
carry
MOV
A,R
r
MOV
A,@ R
MOV
A,#data
MOV
R
r
,A
MOV@R,A
MOV
R
r
,#data
e
o
MOV@R,#data
Move
register to
A
Move
data
memory
to
A
Move
immediate
to
A
Move A
to
register
Move A
to
data
memory
Move
immediate
to
register
Move
immediate
to
data
memory
2
14,34,54,74
94,B4,D4,F4
2
83
1
97
1
A7
1
F8-FF
1
F0-F1
2
23
1
A8-AF
1
A0-A1
2
B8-BF
2
B0-B1
«
SCH
A,R
r
Exchange A
and
register
1
28-2F
XCH
A,@R
Exchange A
and
data
memory
1
20-21
XCHD
a,@ R
Exchange
nibble
of
A
and
register
1
30-31
MOVP A,@A
Move
to
A
from
current
page
2
A3
5
MOV
A,T
Read
timer/counter
1
42
§
MOVT.A
Load
timer/counter
1
62
O STRTT
Start timer
1
55
S
STRTCNT
Start
counter
1
45
§ STOP TCNT
Stop
timer/counter
1
65
5
RAD
Move
conversion
result
2
80
«
register
to
A
|
SEL ANO
Select analog
input
1
85
O
zero
5
SEL
AN
1
<
Select analog
input
one
1
95
EN
I
Enable
external
interrupt
1
05
DISI
Disable
external
1
15
<o
interrupt
§
EN
TCNTI
Enable timer/counter
1
25
»
interrupt
£
DIS
TCNTI
Disable timer/counter
interrupt
1
35
RET
I
Return from
interrupt
2
93
NOP
No
operation
1
00
SYMBOLS AND
ABBREVIATIONS
USED
A
Accumulator
addr
1
1-Bit
Program
Memory
Address
ANO,
AN1
Analog
Input
0,
Analog
Input
1
CNT
Event Counter
data
8-Bit
Number
or
Expression
I
Interrupt
P
Mnemonic
for
"in-page" Operation
Pp
Port
Designator
(P=0,
1,
2
or
4-7)
R
r
Register Designator
(r=0-7)
T
Timer
TO,
T1
Test
0,
Test
1
#
Immediate Data
Prefix
@
Indirect
Address
Prefix
6-41

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