Intel MCS48 User Manual page 421

Family of single chip microcomputers
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MODEL
230
Input/Output
IPB
Serial
Channels
The
I/O
subsystem
in
the
Model
230 consists
of
two
parts:
the
IOC
card
and two
serial
channels on
the IPB
itself.
Each
serial
channel
is
RS232
compatible
and
is
capable
of
running
asynchronously
from 110
to
9600 baud
or
synchronously from
150
to
56K
baud.
Both
may
be connected
to
a user defined data
set
or
terminal.
One
channel
contains
current
loop
adapters.
Both channels
are
implemented
using
Intel's
8251
USART. They
can be programmatically
selected
to
perform a
variety of
I/O
functions.
Baud
rate
selection
is
accomplished progammatically
through an
Intel
8253
interval
timer.
The
8253
also serves
as
a
real-time
clock
for :he
entire
system.
I/O activity
through both
serial
channels
is
signaled
to
the
system
through a
second
8259
interrupt controller,
operating
in
a polled
mode
nested
to
the primary 8259.
IOC
Interface
The
remainder
of
system
I/O activity
takes place
in
the IOC.
The IOC
provides
interface
for
the
CRT,
keyboard,
and
standard
Intellec
peripherals
including
printer,
high
speed
paper tape
reader/punch,
and
universal
PROM
programmer.
The IOC
contains
its
own
independent microprocessor,
also
an
8080A-2.
The
CPU
controls
all
I/O
operations as
well
as supervising
communications
with the
IPB.
8K
bytes
of
ROM
contain
all
I/O
control firmware.
8K
bytes
of
RAM
are
used
for
CRT
screen
refresh storage.
These do
not
occupy space
in
Intellec
Series
II
main
memory
since the
IOC
is
a
totally
independent microcomputer subsystem.
Integral
CRT
Display
The
CRT
is
a 12-inch
raster
scan
type
monitor
with a 50/60
Hz
vertical
scan
rate
and
15.5
kHz
horizontal
scan
rate.
Controls
are
provided
for
brightness
and
con-
trast
adjustments.
The
interface to
the
CRT
is
provided
through an
Intel
8275
single chip
programmable
CRT
controller.
The
master processor on
the
IPB
transfers a
character
for
display
to
the IOC,
where
it
is
stored
in
RAM. The
CRT
controller
reads a
line at
a
time
into
its
line
buffer
through an
Intel
8257
DMA
controller
and
then feeds
one
character
at
a
time
to
the character gen-
erator to
produce
the video
signal.
Timing
for
the
CRT
control
is
provided by an
Intel
8253
interval
timer.
The
screen
display
is
formatted as 25
rows
of
80
characters.
The
full
set of
ASCII characters
are displayed, including
lowe
r
case
alphas.
Keyboard
The
keyboard
interfaces
directly to
the
IOC
processor
via
an
8-bit
data
bus.
The
keyboard
contains
an
Intel
UPI-41
Universal Peripheral
Interface,
which
scans
the keyboard,
encodes
the characters,
and
buf-
fers
i:he
characters
to
provide
N-key
rollover.
The
key-
board
itself
is
a high
quality
typewriter
style
keyboard
containing the
full
ASCII character
set.
An
upper/lower
case
switch allows
the
system
to
be used
for
document
preparation.
Cursor
control
keys
are also provided.
Peripheral Interface
A
UPI-41 Universal Peripheral Interface
on
the
IOC
board
performs
similar
functions
to
the UPI-41
on
the
PIO
board
in
the
Model
210.
It
provides
interface
for
other
standard
Intellec
peripherals including a
printer,
high
speed
paper tape
reader,
high
speed
paper tape punch,
and
universal
PROM
programmer.
Communication
between
the
IPB
and IOC
is
maintained over a separate
8-bit
bidirectional
data
bus.
Connectors
for
the four
devices
named
above, as
well
as
the
two
serial
chan-
nels,
are
mounted
directly
on
the
IOC
itself.
Control
User
control
is
maintained through
a
front panel,
con-
sisting
of
a
power
switch
and
indicator,
reset/boot
switch,
run/halt
light,
and
eight interrupt
switches and
indicators.
The
front
panel
circuit
board
is
attached
directly to
the
IPB,
allowing the
eight interrupt
switches
to
connect
to
the primary 8259,
as
well
as
to
the
Intellec
Series
II
bus.
Diskette
System
The
Intellec
Series
II
double
density diskette
system
provides
direct
access
bulk storage,
intelligent control-
ler,
and two
diskette
drives.
Each
drive
provides
V2 mil-
lion
bytes
of
storage
with a
data
transfer
rate of
500,000
bits/second.
The
controller
is
implemented
with
Intel's
powerful Series
3000
Bipolar
Microcomputer
Set.
The
controller
provides an
interface to
the
Intellec
Series
II
system
bus,
as
well
as supporting
up
to four diskette
drives.
The
diskette
system
records
all
data
in
soft
sec-
tor
format.
The
diskette
system
is
capable
of
performing
seven
different
operations:
recalibrate,
seek,
format
track,
write data, write
deleted
data,
read
data,
and
verify
CRC.
Diskette Controller
Boards
The
diskette controller
consists
of
two
boards, the
channel board
and
the
inter-
face board.
These two
PC
boards
reside
in
the
Intellec
Series
II
system
chassis
and
constitute the diskette
controller.
The
channel board
receives,
decodes and
responds
to
channel
commands
from
the
8080A-2
CPU
in
the
Model
230.
The
interface
board provides
the
diskette controller with a
means
of
communication
with
the diskette drives
and
with the
Intellec
system
bus.
The
interface
board
validates
data during reads using a
cyclic
redundancy check (CRC)
polynomial
and
gener-
ates
CRC
data during
write operations.
When
the
disk-
ette controller
requires
access
to
Intellec
system
mem-
ory,
the interface
board requests
and
maintains
DMA
master
control of the
system
bus,
and generates
the
appropriate
memory command.
The
interface
board
also
acknowledges
I/O
commands
as required by the
Intellec
bus.
In
addition
to
supporting a
second
set of
double
density
drives,
the diskette
controller
may
co-reside
with the
Intel
single density controller
to
allow
up
to 2.5
million
bytes
of on-line storage.
MULTIBUS
Capability
All
Intellec
Series
II
models implement
the industry
standard
MULTIBUS.
MULTIBUS
enables
several
bus
masters,
such
as
CPU
and
DMA
devices, to
share
the
bus and
memory
by operating
at
different
priority levels.
Resolution
of
bus exchanges
is
synchronized by a
bus
clock
signal
derived
independently from
processor
clocks.
Read/write
transfers
may
take place
at
rates
up
to
5
MHz. The bus
structure
is
suitable
for
use
with
any
Intel
microcomputer
family.
9-7

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