Intel MCS48 User Manual page 431

ICE-49
Memory
Mapping
The
8049,
8748 and 8048
contain
internal
program and
data
memory. Both program and data
memory
can be
expanded using
external
memory
devices.
Internal
Memory
—
When
the
MCS-48 microcomputer
is
replaced by the ICE-49 socket
in
a
system, the ICE-49
module supplies
static
RAM
memory
as a replacement
for the internal
microcomputer memory. The
ICE-49
module has
enough
RAM
memory
available to
emulate
up
to
the
total
4K
control
memory
capability of
the
sys-
tem.
The
ICE-49
module
also provides
for
up
to
320
bytes
of
data
memory.
External
Memory
—
The
ICE-49
module separates
replacement control
memory
into
sixteen 256-byte
blocks.
Replacement
external
data
memory
consists of
one 256-byte block.
Each block
of
memory
can be
de-
fined
separately
as supplied by the user
system
or sup-
plied
by the ICE-49 module.
The
user
may
assign ICE-49
equivalent
memory
to
take the place of external
memory
not
yet
supplied
in
his
system.
Symbolic Debugging
ICE-49 software provides
symbolic
definition of
all
MCS-48
registers, flags,
and
selected
MCS-48
pins.
Symbolically defined
pseudo
registers
provide
access
to
the sense
of
MCS-48
flip
flops
which enable
time,
counter,
interrupt,
and
flag-0/flag-1
options.
In
addition,
the user
may
reference locations
in
program and data
memory,
or their
contents, symbolically.
The
user
sym-
bol table
generated along with the object
file
during a
program assembly
may
be loaded
to Intellec
memory
for
access during emulation.
The
user
is
encouraged
to
add
to
this
symbol
table
any additional symbolic values
for
memory
addresses, constants, or variables
he
may
find
useful
during
system
debugging.
Symbols
may
be sub-
stituted for
numeric
values
in
any
of
the ICE-49
com-
mands. Symbolic
reference
is
a great
advantage
to
the
system
designer.
He
is
no
longer burdened with the
need
to recall
or look
up those addresses
of
key
loca-
tions
in
his
program
that
can change
with
each assem-
bly.
Meaningful symbols from
his
source program
may
be used
instead.
For example,
the
command:
GO FROM
.START TILL
XDATA. RSLT
WRITTEN
begins execution
of
the
program
at
the
address
refer-
enced
by
the label
START
in
the designers
assembly
program.
A
breakpoint
is
set to
occur
the
first
time
the
microprocessor
writes to
the external data
memory
location referenced by
RSLT.
The
designer does
not
have
to
be concerned
with the physical locations
of
START and RSLT. The
ICE-49 software
driver
supplies
them
automatically
from
information stored
in
the
symbol
table.
Hardware
The
ICE-49
module
is
a
microcomputer system
utilizing
Intel's
8049
or
8048/8748
microcomputer
as
its
nucleus.
The
8049 provides the 8049, 8039 emulation character-
istics!.
The
8048/8748 provides the 8748/8648/8035/8021
emulation
characteristics.
The
ICE-49
module
uses an
Intel
8080
to
communicate
with the Intellec
host
pro-
cessor
via a
common
memory
space.
The 8080
also con-
trols
an
internal ICE-49
bus
for
intramodule
communica-
tion.
ICE-49
hardware consists
of
two
PC
boards, the
controller board,
and
the
emulator board,
all
of
which
reside
in
the
Intellec
chassis.
A
cable interfaces the
ICE-49
boards
to
the
MCS-48
system.
The
cable
ter-
minates
in
a
MCS-48
pin
compatible plug
which
replaces
any
MCS-48
device
in
the user
system.
The
ICE-49
module block
diagram
is
shown
in
Figure
1.
Real-Time Trace
Trace Buffer
—
While the ICE-49
module
is
executing
the
user program,
it
is
monitoring
port,
program
counter, data,
and
status
lines.
Values
for
each
instruc-
tion
cycle
executed are stored
in
a
255x44
real-time
RAM
trace
buffer.
A
resetable timer resident
on
the con-
troller
board counts instruction cycles.
Controller
Board
The
ICE-49
module
talks to the Intellec
system
as a
peripheral device.
The
controller
board
receives
com-
mands
from
the Intellec
system and responds through
the
parameter
block.
Three
15-bit
hardware breakpoint
registers are available for
loading by the user.
While
in
emulation
mode,
a
hardware comparator
is
constantly
monitoring address and
status lines for a
match
to
ter-
minate an emulation.
The
breakpoint registers provide a
signal
when
a
match
is
detected.
The
user
may
disable
the
emulation break
capability
and use the signal to syn-
chronize other
debug
tools.
The
controller board returns
real-time trace data,
MCS-48
register, flag,
and
pin
values,
and ICE-49 status information,
to
a control block
in
the
Intellec
system
when
emulation
is
terminated.
This information
is
available to
the user
through
the
ICE-49 interrogation
commands.
Error conditions,
when
present, are
automatically displayed
on
the Intellec
system
console.
The
controller
board also contains
static
RAM
memory, which can be used
to
emulate
MCS-48 program and data
memory
in
real
time.
4K
of
memory
is
available
in
sixteen 256-byte
pages
to
emu-
late
MCS-48
PROM
or
PROM
program memory.
A
256-
byte
page
of
data
memory
is
available to
access
in
place
of
MCS-48
external
data
memory. The
controller
board
address
map
directs the ICE-49
module
to
access
either
replacement
ICE-49
memory
or actual
user
system
ex-
ternal
memory
in
256-byte
segments
based on
informa-
tion
provided by the
user.
Emulator Board
The emulator board contains the
8049* and
peripheral
logic
required
to
emulate
the
MCS-48
device
in
the user
system.
A
software selectable 6
MHz
or 3
MHz
clock
drives the
emulated MCS-48
device.
This clock can be
disabled
and replaced with a user supplied
TTL
clock
in
the user
system.
*Use 8048
with internal
monitor program
when
emulating 8748/8048/
8035/8021.
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