Intel MCS48 User Manual page 292

Family of single chip microcomputers
Hide thumbs Also See for MCS48:
Table of Contents

Advertisement

8251
A
FEATURES
AND ENHANCEMENTS
8251
A
is
an advanced
design of the industry
stan-
dard
USART,
the
Intel®
8251.
The 8251
A
oper-
ates
with an extended
range of
Intel
micropro-
cessors that includes
the
new 8085
CPU
and main-
tains
compatibility
with
the
8251.
Familiarization
time
is
minimal
because of compatibility
and
involves
only
knowing
the additional
features
and
enhancements, and
reviewing the
AC
and
DC
speci-
fications
of the
8251
A.
The 8251
A
incorporates
all
the
key
features of
the
8251 and
has the following additional features
and enhancements:
8251
A
has
double-buffered data paths with
separate
I/O
registers
for
control,
status,
Data
In,
and Data
Out,
which
considerably
simplifies
control
programming
and
mini-
mizes
CPU
overhead.
In
asynchronous
operations,
the
Receiver
detects
and
handles
"break"
automatically,
relieving
the
CPU
of
this task.
A
refined
Rx
initialization
prevents
the
Receiver
from
starting
when
in
"break"
state,
preventing
unwanted
interrupts
from
a
disconnected
USART.
At
the conclusion of
a
transmission,
TxD
line will
always
return to the
marking
state
unless
SBRK
is
programmed.
Tx
Enable
logic
enhancement
prevents
a
Tx
Disable
command
from
halting
trans-
mission
until
all
data previously written has
been
transmitted.
The
logic
also
prevents
the transmitter
from
turning off
in
the
middle
of
a
word.
When
External
Sync
Detect
is
programmed,
Internal
Sync
Detect
is
disabled,
and
an Ex-
ternal
Sync
Detect
status
is
provided
via
a
flip-flop
which
clears
itself
upon
a
status read.
Possibility
of
false
sync
detect
is
minimized
by
ensuring that
if
double
character
sync
is
programmed,
the characters
be contiguously
detected
and
also
by
clearing
the
Rx
register
to
all
ones
whenever
Enter
Hunt
command
is
issued
in
Sync mode.
As^
long_a£
the
8251
A
is
not
selected,
the
RD
and
WR
do
not
affect
the
internal
opera-
tion
of the
device.
The
8251
A
Status
can be
read
at
any
time
but
the
status
update
will
be
inhibited
during
status read.
The 8251
A
is
free
from
extraneous
glitches
and
has
enhanced
AC
and
DC
characteristics,
providing higher speed
and
better
operating
margins.
Synchronous Baud
rate
from
DC
to
64K.
Fully
compatible with
Intel's
new
industry
standard, the
MCS-85.
8-2
0021
6A

Advertisement

Table of Contents
loading

Table of Contents