Intel MCS48 User Manual page 323

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8255A/8255A-5
Mode
Definition
Summary
PA
PAi
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PB
PB1
PB
2
PB
3
PB 4
PB
5
PB 6
PB
7
PC
PC1
PC
2
PC
3
PC 4
PC
5
pc
6
PC?
MODEO
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
MODE
1
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
INTR
B
ibf b
stb
b
INTRa
STBa
ibf
a
I/O
I/O
INTRb
obf
b
ACK
B
INTRa
I/O
I/O
ACKa
OBF A
MODE
2
GROUP A ONLY
I/O
I/O
I/O
INTRa
STB
A
ibf
a
ACK
A
OBF A
MODEO
OR MODE
1
ONLY
Special
Mode
Combination
Considerations
There
are several
combinations
of
modes when
not
all
of the
bits in
Port
C
are
used
for control
or
status.
The
remaining
bits
can be used
as
follows:
If
Programmed
as
Inputs
All
input
lines
can be
accessed during
a
normal
Port
C
read.
If
Programmed
as
Outputs
Bits
in
C
upper (PC7-PC4)
must
be
individually accessed
using
the
bit set/reset
function.
Bits
in
C
lower (PC3-PC0) can be
accessed using the
bit
set/reset
function or accessed
as a
threesome by
writing
into
Port
C.
Source
Current
Capability
on
Port
B and
Port
C
Any
set
of eight
output
buffers, selected
randomly from
Ports
B and
C
can source
1mA
at 1.5
volts.
This
feature
allows the
8255
to
directly drive
Darlington
type
drivers
and
high-voltage displays that require
such source
current.
Reading
Port
C
Status
In
Mode
0,
Port
C
transfers
data
to or
from
the
peripheral
device.
When
the
8255
is
programmed
to function
in
Modes
1
or
2,
Port
C
generates or accepts
"hand-shaking"
signals
with the
peripheral device.
Reading
the contents of Port
C
allows the
programmer
to
test
or
verify
the "status" of
each
peripheral
device
and change
the
program
flow
accordingly.
There
is
no
special
instruction to read
the
status
informa-
tion
from
Port
C.
A
normal
read operation of Port
C
is
executed
to
perform
this
function.
INPUT
CONFIGURATION
D
7
D
6
D
5
D
4
D
3
D
2
D,
D
I/O
I/O
IBF
A
INTE
A INTR
A INTE
B
IBF B
INTR
B
GROUP A
GROUP
B
OUTPUT CONFIGURATION
D
7
D
6
D
5
D
4
D
3
D
2
D,
D
OBF
A
INTE A
I/O
I/O
INTR
A
INTE
B
OBF
B
INTR
B
GROUP
A
GROUP
B
Figure
15.
MODE
1
Status
Word
Format
D
7
D
6
D
5
D
4
D
3
D
2
D,
D
OBF
A
INTE,
IBF
A
INTE
2
INTR
A
X X
X
GROUP
A
^^___-
GROUP
B
(DEFINED
BY
MODE
OR MODE
1
SELECTION)
Figure
16.
MODE
2 Status
Word
Format
8-33
00744A

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