Intel MCS48 User Manual page 337

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8259A
INITIALIZATION
COMMAND WORDS
1
AND
2
(ICW1,
ICW2)
A
5
-A
15
:
Page
starting
address
of service routines.
In
an
MCS
80/85
system,
the
8 request
levels
will
generate
CALLs
to
8
locations equally
spaced
in
memory. These
can be
programmed
to
be spaced
at
intervals of
4
or
8
memory
locations,
thus the 8
routines
will
occupy
a
page
of
32
or
64
bytes, respectively.
The
address
format
is
2
bytes long
(A
-A
15
).
When
the
routine
interval
is 4,
A
-A
4
are automatically inserted
by
the
8259A, while
A
5
-A
15
are
programmed
externally.
When
the routine
interval
is 8,
A
-A
5
are automatically
inserted
by the 8259A, while
A
6
-A
15
are
programmed
externally.
The
8-byte
interval
will
maintain
compatibility with
cur-
rent
software, while the 4-byte
interval
is
best
for
a
com-
pact
jump
table.
In
an
MCS-86
system
A
15
-A
n
are inserted
in
the
five
most
significant
bits of
the vectoring byte
and
the
8259A
sets the three
least significant bits
according
to
the
interrupt
level.
A
10
-A
5
are ignored
and AOI
(Address
interval)
has no
effect.
LTIM:
If
LTIM =
1,
then the
8259A
will
operate
in
the
level
interrupt
mode. Edge
detect
logic
on
the
interrupt
inputs
will
be
disabled.
ADI:
CALL
address
interval.
ADI
=
1
then
interval
=
4;
ADI
=
then
interval
=
8.
SNGL:
Single.
Means
that this
is
the only
8259A
in
the
system.
If
SNGL
=
1
no
ICW3
will
be
issued.
IC4:
If
this
bit is
set
ICW4
has
to
be
read.
If
ICW4
is
not
needed,
set
IC4
=
0.
INITIALIZATION
COMMAND WORD
3
(ICW3)
This
word
is
read only
when
there
is
more
than
one
8259A
in
the
system and cascading
is
used,
in
which
case
SNGL
=
0.
It
will
load the
8-bit
slave
register.
The
functions
of this register are:
a.
In
the
master
mode
(either
when SP =
1
,
or
in
buffered
mode when M/S=1
in
ICW4)
a
"1"
is
set
for
each
slave
in
the
system.
The
master
then
will
release byte
1
of
the
call
sequence
(for
MCS-80/85 system) and
will
enable
the
corresponding
slave
to
release
bytes
2
and
3
(for
MCS-86
only byte
2)
through
the
cascade
lines.
b.
In
the slave
mode
(either
when SP =
0,
or
if
BUF=
1
and M/S
=
in
ICW4)
bits
2-0
identify
the
slave.
The
slave
compares
its
cascade
input with
these
bits
and,
if
they
are equal,
bytes 2
and
3
of
the
call
sequence
(or
just
byte 2
for
MCS-86)
are released
by
it
on
the
Data
Bus.
INITIALIZATION
COMMAND WORD
4 (ICW4)
BUF:
M/S:
SFNM:
If
SFNM=1
the special
fully
nested
mode
is
programmed.
If
BUF=
1
the buffered
mode
is
programmed.
In
buffered
mode
SP/EN becomes
an enable
outpul
and
the master/slave determination
is
by M/S.
If
buffered
mode
is
selected:
M/S=
1
means
the
8259A
is
programmed
to
be
a master,
M/S =
means
the
8259A
is
programmed
to
be a
slave.
If
BUF
=
0,
M/S
has
no
function.
AEOI:
If
AEOI =
1
the
automatic
end
of interrupt
mode
is
programmed.
uPM:
Microprocessor
mode:
>iPM
=
sets the
8259A
for
MCS-80/85 system
operation,
^PM
=
1
sets
the
8259A
for
MCS-86
system
operation.
(SNQL.1)
NO
(SNGL-0)
S3
READY TO ACCEPT REQUESTS
IN
THE FULLY NESTED
MODE
Figure
1.
Initialization
Sequence
8-47

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