Intel MCS48 User Manual page 83

INSTRUCTION SET
4.0
INTRODUCTION
The MCS-48
instruction set
is
extensive
for
a
machine
of
its
size
and
has
been
tailored
to
be
straightforward
and
very
efficient
in
its
use
of
program memory.
All
instructions
are
either
one
or
two
bytes
in
length
and
over
70%
are only
one
byte long. Also,
all
instructions
execute
in
either
one
or
two
cycles
(2.5jusec
or
5.0/usec
when
using a 6
MHz
XTAL)
and over
50%
of
all
instructions
execute
in
a single
cycle.
Double
cycle
instructions include
all
immediate
instruc-
tions,
and
all
I/O instructions.
The MCS-48
microcomputers have been
designed
to efficiently
handle
arithmetic
operations
in
both binary
and
BCD
as
well
as to efficiently
handle the single
bit
operations required
in
control applications.
Special
instructions
have
also
been
in-
cluded
to
simplify
loop counters,
table
lookup
routines,
and
N-way
branch
rou-
tines.
Data
Transfers
As
can be seen
in
the
accompanying
diagram, the
8-bit
accumulator
is
the
central
PROGRAM
MEMORY
(=data)
EXPANDER
I/O
PORTS
4-7
c
MOVD
ANLD
ORLD
MOV
^\
DATA
MEMORY
WORKING REG
(4)
<z
ADD
MOV
MOVP
MOVP3
AIML
ORL
XRL
MOV
ADD
ANL
ORL
XRL
XCH
/%
iz
Cl
MOV
ADD
ANL
ORL
XRL
XCH
XCHD iz
ACCUMULATOR
7\ 7\
MOV
iz
TIMER
COUNTER
7\
MOVX
<
C
BUS(8)
^
>
IN
OUTL
MOV
EXTERNAL
MEMORY
AND
PERIPHERALS
\7
PROGRAM
STATUS
WORD
ANL
ORL
>
Iz
ON
CHIP
I/O
PORTS
1,2,
BUS
z\ /\ s\
8048
8049
8748
8035*
8039*
'NO
PROGRAM
MEMORY
(8) (8) (8)
\S
<J? <J?
DATA TRANSFER
INSTRUCTIONS
4-1