Intel MCS48 User Manual page 216

Family of single chip microcomputers
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8755A
A.
INPUT
MODE
i
RDOR
10
R
V
/
I
-"
»
l
PR
H
l
RP
PORT
\J
INPUT
y^
X
""
'
J
DATA'
BUS
B.
OUTPUT
MODE
X
IOW
\
-i
|
GLITCH FREE
"*]
^Z'
OUTPUT
PORT
\/~
OUTPUT
_y\_
DATA*
\/
BUS
/\
•DATA BUS
TIMING
IS
SHOWN
IN
FIGURE
4.
X
Figure
4.
I/O
Port
Timing
(CE=1) '(CE=0)
A\_^\
/
V
Figure
5.
Wait
State
Timing
(READY =
0)
6-64

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