Intel MCS48 User Manual page 223

Family of single chip microcomputers
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81 55/81 56/81 55-2/81
56-2
INPUT/OUTPUT SECTION
The
I/O section
of
the
81
55/81
56
consists
of
five
registers:
(See Figure
5.)
Command/Status
Register (C/S)
Both
registers
are
assigned
the
address
XXXXX000. The C/S
address
serves the dual purpose.
When
the
C/S
registers
are selected during
WRITE
operation, a
command
is
written
into
the
command
register.
The
contents
of
this
registerare
nor accessible
through
the
pins.
When
the
C/S (XXXXX000)
is
selected during a
READ
operation, the status information
of
the I/O ports
and
the timer
becomes
available
on
the
ADo-7
lines.
PA
Register
This
register
can be
programmed
to
be
either input or
output
ports
depending on
the status
of
the
contents
of
the
C/S
Register.
Also
depending on
the
command,
this
port
can
operate
in
either
the basic
mode
or the strobed
mode
(See timing diagram).
The
I/O pins
assigned
in
relation to this register
are PA0-7.
The
address
of this register
is
XXXXX001.
PB
Register
This
register
functions the
same
as
PA
Register.
The
I/O pins
assigned
are PB0-7.
The
address
of this register
is
XXXXX010.
PC
Register
This
register
has
the
address
XXXXX01
1
and
contains only
6
bits.
The
6
bits
can be program-
med
to
be
either input ports,
output
ports or
as
control
signals
for
PA
and
PB
by
properly
programming
the
AD2
and
AD3
bits
of
the
C/S
register.
When
PC0-5
is
used as
a control
port,
3
bits
are
assigned
for
Port
A
and
3
for
Port
B.
The
first
bit
is
an
interrupt that
the
8155 sends
out.
The second
is
an
output
signal indicating
whether
the buffer
is full
or
empty,
and
the
third
is
an
input pin
to
accept
a strobe
for
the
strobed
input
mode.
(See Table
1.)
When
the
'C
port
is
programmed
to either
ALT3
or
ALT4,
the control signals
for
PA
and
PB
are
initialized
as
follows:
CONTROL
INPUT
MODE
OUTPUT
MODE
BF
INTR
STB
Low
Low
Input Control
Low
High
Input Control
I/O
ADDRESSt
SELECTION
A7 A6 AS A4 A3 A2
A1
AO
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
Interval
Command/Status
Register
General
Purpose
I/O Port
A
General
Purpose
I/O Port
B
Port
C
General
Purpose
I/O or
Control
Low-Order
8
bits
of
Timer
Count
High
6
bits
of
Timer Count and
2 bits
of
Timer
Mode
X:
Don't Care.
_
f:
I/O
Address must be
qualified
by
CE
=
1
i8156)orCE = 0(8155)andlO/M =
1
in
order
to
select
the appropriate
register.
Figure
5.
I/O port
and Timer
Addressing
Scheme
Figure 6
shows
how
I/O
PORTS A
and B
are structured
within the
8155 and
8156:
8155/8156
ONE
BIT
OF PORT A
OR
PORT
B
s\
OUTPUT
LATCH
ffl
-or
OUTPUT
ENABLE
CLK
<H
}
STB
V
NOTES:
(1)
OUTPUT MODE
(2)
SIMPLE INPUT
(3)
STROBED
INPUT.
READ PORT
= (IO/Mf1)
(RDfO)
(CE
ACTIVE)
(PORT
ADDRESS
SELECTED)
WRITE PORT
=(IO/M=1)«
(WR=0)
(CE
ACTIVE)
(PORT
ADDRESS
SELECTED)
MULTIPLEXER
CONTROL
(4)
=
1
FOR OUTPUT
MODE
=
FOR
INPUT
MODE
Figure
6.
8155/8156
Port
Functions
6-71

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