Details Of Sample Software; Clock Generator (Clg) - Epson S1C31D01 Software Manual

Cmos 32-bit single chip microcontroller peripheral circuit sample software manual
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3 Details of Sample Software

Hardware setup is required for some examples. Refer to "S5U1C31D01T1 manual" for additional information.

3.1 Clock Generator (CLG)

CLG module is the clock generator that controls the clock sources and manages clock supply to the CPU and the
peripheral circuits.
The example executes various CLG functions such as starting OSCs, setting Wake up clocks and sleep modes.
Operations
1. Initializes CLG.
2. Run auto-trimming of IOSC.
3. Verifies Sleep or Halt states running various clocks.
4. Verifies Wakeup states running various clocks.
Example of Output
-CPU clock- seCLG_IOSC (20000000)
CLG Initialization ok
CLG IOSC Auto-trimming ok
Halt (OSC3)
-actual- seCLG_OSC3
Wake up (OSC3) -actual- seCLG_OSC3
Sleep (OSC1)
-actual- seCLG_OSC1
Wake up (OSC3) -actual- seCLG_OSC3
Exit
S1C31D01 Peripheral Circuit
Sample Software Manual (Rev.3.00)
Seiko Epson Corporation
29

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