Clg Osc1 Control Register - Epson S1C17W03 Technical Manual

Cmos 16-bit single chip microcontroller
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2 POWER SUPPLY, RESET, AND CLOCKS
Bit 4
IOSCSTM
This bit controls the IOSCCLK auto-trimming function.
1 (WP):
Start trimming
0 (WP):
Stop trimming
1 (R):
Trimming is executing.
0 (R):
Trimming has finished. (Trimming operation inactivated.)
This bit is automatically cleared to 0 when trimming has finished.
Notes: • Do not use IOSCCLK as the system clock or peripheral circuit clocks while the CLGIOSC.
IOSCSTM bit = 1.
• The auto-trimming function does not work if the OSC1 oscillator circuit is stopped. Make
sure the CLGINTF.OSC1STAIF bit is set to 1 before starting the trimming operation.
Bits 3–0
Reserved

CLG OSC1 Control Register

Register name
Bit
CLGOSC1
15
14
13
12
11
10–8 CGI1[2:0]
7–6 INV1B[1:0]
5–4 INV1N[1:0]
3–2 –
1–0 OSC1WT[1:0]
Bit 15
Reserved
Bit 14
OSDRB
This bit enables the OSC1 oscillator circuit restart function by the oscillation stop detector when
OSC1 oscillation stop is detected.
1 (R/WP): Enable (Restart the OSC1 oscillator circuit when oscillation stop is detected.)
0 (R/WP): Disable
Bit 13
OSDEN
This bit controls the oscillation stop detector in the OSC1 oscillator circuit.
1 (R/WP): OSC1 oscillation stop detector on
0 (R/WP): OSC1 oscillation stop detector off
Note: Do not write 1 to the CLGOSC1.OSDEN bit before stabilized OSC1CLK is supplied.
Furthermore, the CLGOSC1.OSDEN bit should be set to 0 when the CLGOSC.OSC1EN bit
is set to 0.
Bit 12
OSC1BUP
This bit enables the oscillation startup control circuit in the OSC1 oscillator circuit.
1 (R/WP): Enable (Activate booster operation at startup.)
0 (R/WP): Disable
Bit 11
Reserved
2-20
Bit name
Initial
0
OSDRB
1
OSDEN
0
OSC1BUP
1
0
0x0
0x2
0x1
0x0
0x2
Seiko Epson Corporation
Reset
R/W
R
H0
R/WP
H0
R/WP
H0
R/WP
R
H0
R/WP
H0
R/WP
H0
R/WP
R
H0
R/WP
S1C17W03/W04 TECHNICAL MANUAL
Remarks
(Rev. 1.2)

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