Interaction Of The Mmu, Instruction Cache, And Data Cache; Valid Mmu & Data/Mini-Data Cache Combinations - Intel XScale Core Developer's Manual

3.3 Interaction of the MMU, Instruction Cache, and Data
Cache
The MMU, instruction cache, and data/mini-data cache may be enabled/disabled independently.
The instruction cache can be enabled with the MMU enabled or disabled. However, the data cache
can only be enabled when the MMU is enabled. Therefore only three of the four combinations of
the MMU and data/mini-data cache enables are valid. The invalid combination will cause
undefined results.
Table 3-4. Valid MMU & Data/mini-data Cache Combinations
Developer's Manual
MMU
Off
On
On
January, 2004
Intel XScale® Core Developer's Manual
Memory Management
Data/mini-data Cache
Off
Off
On
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