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Intel XScale® Core Developer's Manual
Software Debug
9.14.4
LDIC Cache Functions
Elkhart supports four cache functions that can be executed through JTAG. Two functions allow an
external host to download code into the main instruction cache or the mini instruction cache
through JTAG. Two additional functions are supported to allow lines to be invalidated in the
instruction cache. The following table shows the cache functions supported through JTAG.
Table 9-19.
LDIC Cache Functions
Invalidate IC Line
Invalidate Mini IC
Invalidate IC line invalidates the line in the instruction cache containing specified virtual address.
If the line is not in the cache, the operation has no effect. It does not take any data arguments.
Invalidate Mini IC
instruction cache. It does not require a virtual address or any data arguments.
Load Main IC and Load Mini IC write one line of data (8 ARM instructions) into the specified
instruction cache at the specified virtual address. Load Main IC has been deprecated on the Intel
®
XScale
Each cache function is downloaded through JTAG in 33 bit packets.
formats for each of the JTAG cache functions. Invalidate IC Line and Invalidate Mini IC each
require 1 packet. Load Main IC and Load Mini IC each require 9 packets.
1.
The LDIC Invalidate Mini IC function does not invalidate the BTB (like the CP15 Invalidate IC function) so software must do this manually
where appropriate.
156
Function
Load Main IC
Load Mini IC
RESERVED
1
will invalidate the entire mini instruction cache. It does not effect the main
core. A debugger should only load code into the mini instruction cache.
January, 2004
Encoding
0b000
VA of line to invalidate
0b001
0b010
VA of line to load
0b011
VA of line to load
0b100-0b111
Arguments
Address
# Data Words
-
-
Figure 9-8
shows the packet
Developer's Manual
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0
8
8
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