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Intel XScale® Core Developer's Manual
Performance Monitoring
8.3.5
Overflow Flag Status Register (FLAG)
FLAG identifies which counter has overflowed and also indicates an interrupt has been requested if
the overflowing counter's corresponding interrupt enable bit (contained within INTEN) is asserted.
An overflow is cleared by writing a '1' to the overflow bit.
Table 8-10.
Overflow Flag Status Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
reset value: [4:0] = 0b00000 , others unpredictable
Bits
31:5
4
3
2
1
0
110
Access
Read-unpredictable / Write-as-0
Read / Write
Read / Write
Read / Write
Read / Write
Read / Write
January, 2004
8
Description
Reserved
PMN3 Overflow Flag (P3) -
Read Values:
0 = no overflow
1 = overflow has occurred
Write Values:
0 = no change
1 = clear this bit
PMN2 Overflow Flag (P2) -
Read Values:
0 = no overflow
1 = overflow has occurred
Write Values:
0 = no change
1 = clear this bit
PMN1 Overflow Flag (P1) -
Read Values:
0 = no overflow
1 = overflow has occurred
Write Values:
0 = no change
1 = clear this bit
PMN0 Overflow Flag (P0) -
Read Values:
0 = no overflow
1 = overflow has occurred
Write Values:
0 = no change
1 = clear this bit
CCNT Overflow Flag (C) -
Read Values:
0 = no overflow
1 = overflow has occurred
Write Values:
0 = no change
1 = clear this bit
7
6
5
4
3
2
1
0
P
P
P
P
C
3
2
1
0
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