Prefetch Aborts; Encoding Of Fault Status For Prefetch Aborts - Intel XScale Core Developer's Manual

2.3.4.3

Prefetch Aborts

The Intel XScale
abort on an instruction access, and an instruction cache parity error. These aborts are described in
Table 2-13.
When a prefetch abort occurs, hardware reports the highest priority one in the extended Status field
of the Fault Status Register. The value placed in R14_ABORT (the link register in abort mode) is
the address of the aborted instruction + 4.
Table 2-13.

Encoding of Fault Status for Prefetch Aborts

Priority
Highest
Lowest
a. All other encodings not listed in the table are reserved.
Developer's Manual
®
core detects three types of prefetch aborts: Instruction MMU abort, external
Sources
Instruction MMU Exception
Several exceptions can generate this encoding:
- translation faults
- domain faults, and
- permission faults
It is up to software to figure out which one occurred.
External Instruction Error Exception
This exception occurs when the external memory system
reports an error on an instruction cache fetch.
Instruction Cache Parity Error Exception
January, 2004
Intel XScale® Core Developer's Manual
Programming Model
a
FS[10,3:0] Domain
0b10000
0b10110
0b11000
FAR
invalid invalid
invalid invalid
invalid invalid
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